Class B Output Stage

** Circuit Description **
* power supplies
Vcc+ 1 0 DC +23V
Vcc- 2 0 DC -23V
* input signal source
Vi 3 0 sin ( 0V 17.9V 1kHz )
* output buffer
Qn 1 3 4 NA51
Qp 2 3 4 NA52
* load resistance
Rl 4 0 8
* transistor model statement for National Semiconductor's 
* complementary transistors NA51 and NA52
.model NA51 NPN (Is=10f Xti=3 Eg=1.11 Vaf=100 Bf=100 Ise=0 Ne=1.5 Ikf=0
+                Nkf=.5 Xtb=1.5 Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=76.97p Mjc=.2072 $ Nk -> Nkf
+                Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n Tf=1n Itf=1 Xtf=0
+                Vtf=10)
.model NA52 PNP (Is=10f Xti=3 Eg=1.11 Vaf=100 Bf=100 Ise=0 Ne=1.5 Ikf=0
+                Nkf=.5 Xtb=1.5 Br=1 Isc=0 Nc=2 Ikr=0 Rc=0 Cjc=112.6p Mjc=.1875 $ Nk -> Nkf
+                Vjc=.75 Fc=.5 Cje=5p Mje=.3333 Vje=.75 Tr=10n Tf=1n Itf=1 Xtf=0
+                Vtf=10)
** Analysis Requests **
.tran 10us 3ms 0ms 10us
** Output Requests **
.plot tran V(1) i(Vcc+) 
.plot tran V(2) i(Vcc-)
.plot tran V(4) i(Rl)
.plot tran V(1,4) i(Vcc+)
.plot tran V(2,4) i(Vcc-)
.probe
.end