DRAFT 5.002.1 RTDS TITLE: Test Circuit CREATED: Apr 3, 2013 (operador) LAST-MODIFIED: Oct 11, 2017 (elpel) TIME-STEP: 5.0E-5 FINISH-TIME: 0.2 PRINT-STEP: 5.0E-4 RTDS-RACK: 1 COMPILE-MODE: AUTO DISTRIBUTION_MODE: 0 RTDS REAL-TIME: Yes CURRENT-SUBSYSTEM: 1 DEFAULT-VIEWMODE: 3 DEFAULT-ZOOM: 122 DEFAULT-POINT: 0,300 1 SUBSYSTEMS SUBSYSTEM-TAB-NAME: SS #1 SUBSYSTEM-TITLE: SUBSYSTEM-COMMENT: SUBSYSTEM-PRINTMODE: PRINT-LAYOUT:CUSTOM PAPER-DIMENSIONS:8.5x11 110 COMPONENTS rtds_sharc_ctl_RMS 560 80 0 0 7 Mode :Three Phase pu :No Sc :13.8 LL :Line-Neutral unit :kV Proc :1 Pri :3 WIRE 496 80 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 592 80 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 624 80 0 0 3 Name :VMac COL :BLUE Monitor :Yes WIRE 720 80 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 816 80 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_RMS 784 80 0 0 7 Mode :Three Phase pu :No Sc :230.0 LL :Line-Neutral unit :none Proc :1 Pri :2 WIRE 496 48 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 496 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 720 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 720 48 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 496 48 0 0 3 Name :N1 COL :BLUE Monitor :Yes wirelabel 720 48 0 0 3 Name :N4 COL :BLUE Monitor :Yes wirelabel 496 80 0 0 3 Name :N2 COL :BLUE Monitor :Yes wirelabel 496 112 0 0 3 Name :N3 COL :BLUE Monitor :Yes wirelabel 720 80 0 0 3 Name :N5 COL :BLUE Monitor :Yes wirelabel 720 112 0 0 3 Name :N6 COL :BLUE Monitor :Yes rtds_sharc_ctl_ANGDIFF 1040 112 0 0 4 OSU :Radians Ref :Bus1 - Bus2 Proc :1 Pri :4 rtds_sharc_ctl_IMPEXP 944 80 2 1 2 Name :N1 Type :FLOAT rtds_sharc_ctl_IMPEXP 944 112 2 1 2 Name :N2 Type :FLOAT rtds_sharc_ctl_IMPEXP 944 144 2 1 2 Name :N3 Type :FLOAT rtds_sharc_ctl_IMPEXP 1136 80 2 0 2 Name :N4 Type :FLOAT rtds_sharc_ctl_IMPEXP 1136 112 2 0 2 Name :N5 Type :FLOAT rtds_sharc_ctl_IMPEXP 1136 144 2 0 2 Name :N6 Type :FLOAT wirelabel 1040 48 2 0 3 Name :AngDif COL :BLUE Monitor :Yes wirelabel 848 80 0 0 3 Name :VBus COL :BLUE Monitor :Yes rtds_sharc_ctl_SLIDER 272 80 0 1 5 Name :SL1 Init :1.0 Max :10 Min :0 Units :volts HIERARCHY 48 176 0 0 22 FCOL :BLACK BCOL :WHITE LW :1.0 DESC1 :Power DESC2 :Control IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :40 x1 :-32 y1 :-32 x2 :32 y2 :32 canvasX :37 canvasY :40 canvasWidth :957 canvasHeight :429 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No WIRE 464 144 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 464 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 464 176 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_GAIN 528 176 0 0 3 K :0.8 Proc :1 Pri :57 WIRE 656 176 0 0 2 -96 -4 64 4 COL :RED LW :1.0 wirelabel 592 176 0 0 3 Name :PPTerm COL :BLUE Monitor :Yes rtds_sharc_ctl_SIGSW 400 176 0 0 5 A :1 DPath :REAL Pos :A Proc :1 Pri :56 WIRE 432 176 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 432 176 0 0 3 Name :PErr COL :BLUE Monitor :Yes rtds_sharc_ctl_CONSTANT 336 176 0 0 1 Val :0.0 wirelabel 400 208 0 0 3 Name :BRK1 COL :BLUE Monitor :Yes WIRE 784 176 0 0 2 -32 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_SUM3 720 176 2 1 7 Num :TWO IorF :REAL IN1 :+ IN2 :+ IN3 :- Proc :1 Pri :61 WIRE 720 144 1 0 2 -4 -32 4 0 COL :RED LW :1.0 WIRE 720 112 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 720 112 2 0 3 Name :PITerm COL :BLUE Monitor :Yes rtds_sharc_ctl_INTGL 624 112 0 0 9 T :1 RST :No LIM :Internal Xic :0.0 Yic :0.0 PItype :Fixed Tic :1 Proc :1 Pri :60 WIRE 592 112 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_GAIN 528 112 0 0 3 K :0.1 Proc :1 Pri :59 rtds_sharc_ctl_CONSTANT 720 80 2 0 1 Val :1.1 rtds_sharc_ctl_CONSTANT 624 144 0 0 1 Val :0.0 wirelabel 816 176 2 0 3 Name :P_g_pos COL :BLUE Monitor :Yes WIRE 336 144 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_REALPL 208 144 0 0 12 T :0.2 G :1 RST :No LIM :None TGD :No Xic :0.0 Yic :0.0 PItype :Fixed Tic :1.0 Gic :1.0 Proc :1 Pri :36 WIRE 304 144 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_SUM3 304 144 2 1 7 Num :TWO IorF :REAL IN1 :+ IN2 :- IN3 :- Proc :1 Pri :46 wirelabel 272 144 0 0 3 Name :PFil COL :BLUE Monitor :Yes WIRE 144 144 0 0 2 -32 -4 32 4 COL :RED LW :1.0 wirelabel 144 144 0 0 3 Name :PMACH1(pu) COL :BLUE Monitor :Yes rtds_sharc_ctl_RATELIMIT 272 48 0 1 6 ULim :0.5 LLIm :-0.5 Xic :0.0 Yic :0.0 Proc :1 Pri :35 rtds_sharc_ctl_SLIDER 176 48 0 0 5 Name :setpointP Init :0.1 Max :1 Min :0 Units :volts WIRE 304 80 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 304 48 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 240 48 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 304 48 2 0 3 Name :Preq COL :BLUE Monitor :Yes rtds_sharc_ctl_XDIVY 80 144 0 0 4 DBZ :Halt Val :1e8 Proc :1 Pri :34 wirelabel 48 144 0 1 3 Name :PMACH1 COL :BLUE Monitor :Yes WIRE 48 144 0 1 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 48 176 0 0 1 Val :194.5 rtds_BLUETEXT1 432 240 0 0 1 AL1 :PI de controle de potência rtds_sharc_ctl_EXPORT 144 80 2 1 1 Name :Kp wirelabel 208 80 0 0 3 Name :Kp COL :BLUE Monitor :Yes WIRE 208 80 0 0 2 -32 -4 32 4 COL :RED LW :1.0 HIERARCHY 48 112 0 0 22 FCOL :BLACK BCOL :WHITE LW :1.0 DESC1 :Speed DESC2 :Regulator IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :106 x1 :-32 y1 :-32 x2 :32 y2 :32 canvasX :25 canvasY :45 canvasWidth :724 canvasHeight :645 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No WIRE 368 112 0 0 2 -160 -4 192 4 COL :RED LW :1.0 rtds_sharc_ctl_SIGSW 176 112 0 0 5 A :0 DPath :REAL Pos :A Proc :1 Pri :89 WIRE 144 80 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 112 80 2 0 3 Name :w_g_pos COL :BLUE Monitor :Yes wirelabel 112 112 2 0 3 Name :P_g_pos COL :BLUE Monitor :Yes WIRE 144 112 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_BLUETEXT1 80 16 0 0 1 AL1 :Abertura pelo reg. de velocidade wirelabel 176 304 0 0 3 Name :BRK1 COL :BLUE Monitor :Yes WIRE 176 208 1 0 2 -4 -64 4 96 COL :RED LW :1.0 rtds_BLUETEXT1 80 144 0 0 1 AL1 :Abertura pelo reg. de velocidade rtds_BLUETEXT1 240 16 0 0 1 AL1 :LÓGICA DE CONTROLE rtds_BLUETEXT1 656 16 0 0 1 AL1 :LÓGICA AUXILIAR DE PARTIDA EM DEGRAUS WIRE 592 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_SIGSW 656 144 0 0 5 A :1 DPath :REAL Pos :A Proc :1 Pri :93 WIRE 624 176 1 0 2 -4 -32 4 64 COL :RED LW :1.0 rtds_sharc_ctl_SIGSW 720 176 0 0 5 A :1 DPath :REAL Pos :A Proc :1 Pri :102 wirelabel 752 176 0 0 3 Name :g COL :BLUE Monitor :Yes WIRE 720 240 1 0 2 -4 -32 4 64 COL :RED LW :1.0 wirelabel 656 176 0 1 3 Name :W(75) COL :BLUE Monitor :Yes WIRE 688 208 1 0 2 -4 -32 4 64 COL :RED LW :1.0 rtds_sharc_ctl_DYNLIMS 592 112 0 1 3 IorF :REAL Proc :1 Pri :92 rtds_sharc_ctl_CONSTANT 528 144 0 0 1 Val :0.0 rtds_sharc_ctl_CONSTANT 624 80 2 0 1 Val :1.1 rtds_sharc_ctl_CONSTANT 656 272 0 0 1 Val :0.0 wirelabel 720 304 0 1 3 Name :partida COL :BLUE Monitor :Yes GROUP 496 240 0 0 0 7 WIRE 560 304 1 0 2 -4 -32 4 0 COL :RED LW :1.0 wirelabel 560 304 0 1 3 Name :W(25) COL :BLUE Monitor :Yes WIRE 496 208 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 496 240 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_SIGSW 560 240 0 0 5 A :1 DPath :REAL Pos :A Proc :1 Pri :66 rtds_sharc_ctl_CONSTANT 464 240 0 0 1 Val :0.4 rtds_sharc_ctl_CONSTANT 464 208 0 0 1 Val :0.1 WIRE 624 240 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_COMPARE 912 432 0 0 9 LOG :A >= B INPT :REAL OUTT :INTEGER Proc :1 Pri :65 IOAB :1 IOBA :0 FOAB :1 FOBA :0 WIRE 848 464 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 848 432 0 1 3 Name :W(pu) COL :BLUE Monitor :Yes rtds_sharc_ctl_CONSTANT 816 464 0 0 1 Val :0.75 WIRE 848 432 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 944 432 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 976 432 0 1 3 Name :W(75) COL :BLUE Monitor :Yes wirelabel 528 432 0 1 3 Name :W(pu) COL :BLUE Monitor :Yes rtds_sharc_ctl_CONSTANT 496 464 0 0 1 Val :0.25 WIRE 528 464 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 528 432 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_COMPARE 592 432 0 0 9 LOG :A >= B INPT :REAL OUTT :INTEGER Proc :1 Pri :64 IOAB :1 IOBA :0 FOAB :1 FOBA :0 WIRE 560 528 1 0 2 -4 0 4 32 COL :RED LW :1.0 wirelabel 656 496 0 1 3 Name :t1 COL :BLUE Monitor :Yes WIRE 624 496 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 624 432 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 656 432 0 1 3 Name :W(25) COL :BLUE Monitor :Yes rtds_sharc_ctl_MONO 112 400 0 0 7 PN :Rising TM :Fixed LOT :0.0 OT :1 OR :0 Proc :1 Pri :38 rtds_sharc_ctl_MONO 112 464 0 0 7 PN :Rising TM :Fixed LOT :0.0 OT :1 OR :0 Proc :1 Pri :37 rtds_sharc_ctl_PB 16 400 0 0 4 Name :Partida Type :INTEGER VOn :1 VOff :0 rtds_sharc_ctl_PB 16 464 0 0 4 Name :Parada Type :INTEGER VOn :1 VOff :0 WIRE 48 400 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 48 464 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 208 400 0 0 2 -64 -4 64 4 COL :RED LW :1.0 WIRE 144 464 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_LOGIC 208 464 0 0 6 Type :OR Inv :No Op :LSB Ninp :3 Proc :1 Pri :100 rtds_sharc_ctl_MONO 112 528 0 0 7 PN :Rising TM :Fixed LOT :0.0 OT :1 OR :0 Proc :1 Pri :108 WIRE 48 528 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 144 496 1 0 2 -4 0 4 32 COL :RED LW :1.0 WIRE 144 496 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 176 560 1 0 2 -4 -32 4 32 COL :RED LW :1.0 rtds_sharc_ctl_MONO 112 592 0 0 7 PN :Rising TM :Fixed LOT :0.0 OT :1 OR :0 Proc :1 Pri :82 WIRE 144 592 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 48 592 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 48 528 0 1 3 Name :t1 COL :BLUE Monitor :Yes wirelabel 48 592 0 1 3 Name :t2 COL :BLUE Monitor :Yes wirelabel 368 400 0 1 3 Name :partida COL :BLUE Monitor :Yes WIRE 336 400 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_SRFF 304 432 0 0 4 ISTA :Q = 0 INV :High Proc :1 Pri :101 wirelabel 240 464 2 1 3 Name :reset COL :BLUE Monitor :Yes WIRE 240 464 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 560 592 3 0 1 Val :5 WIRE 528 496 1 0 2 -4 0 4 32 COL :RED LW :1.0 rtds_sharc_ctl_COMPARE 912 496 0 0 9 LOG :A >= B INPT :REAL OUTT :INTEGER Proc :1 Pri :81 IOAB :1 IOBA :0 FOAB :1 FOBA :0 WIRE 880 528 1 0 2 -4 0 4 32 COL :RED LW :1.0 wirelabel 976 496 0 1 3 Name :t2 COL :BLUE Monitor :Yes WIRE 944 496 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_COMPARE 592 496 0 0 9 LOG :A >= B INPT :REAL OUTT :INTEGER Proc :1 Pri :107 IOAB :1 IOBA :0 FOAB :1 FOBA :0 rtds_sharc_ctl_TIME 752 496 0 0 3 Mode :second Proc :1 Pri :72 rtds_sharc_ctl_TIME 432 496 0 0 3 Mode :second Proc :1 Pri :105 WIRE 720 528 1 0 2 -4 -64 4 64 COL :RED LW :1.0 WIRE 400 528 1 0 2 -4 -64 4 32 COL :RED LW :1.0 rtds_sharc_ctl_SIGSW 496 528 0 0 5 A :0 DPath :REAL Pos :A Proc :1 Pri :106 WIRE 528 496 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 496 560 0 1 3 Name :W(25) COL :BLUE Monitor :Yes rtds_sharc_ctl_CONSTANT 464 560 3 0 1 Val :0 rtds_sharc_ctl_CONSTANT 880 592 3 0 1 Val :60 rtds_sharc_ctl_SIGSW 816 528 0 0 5 A :0 DPath :REAL Pos :A Proc :1 Pri :80 WIRE 848 496 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 848 496 1 0 2 -4 0 4 32 COL :RED LW :1.0 wirelabel 816 560 0 1 3 Name :W(75) COL :BLUE Monitor :Yes rtds_sharc_ctl_CONSTANT 784 560 3 0 1 Val :0 wirelabel 848 528 0 1 3 Name :t2antes COL :BLUE Monitor :Yes rtds_sharc_ctl_LOGIC 720 624 3 0 6 Type :OR Inv :No Op :LSB Ninp :2 Proc :1 Pri :71 rtds_sharc_ctl_EDGEDET 688 656 0 0 4 ED :0 -> 1 OV :1 Proc :1 Pri :70 WIRE 624 656 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 624 656 0 1 3 Name :W(25) COL :BLUE Monitor :Yes rtds_sharc_ctl_EDGEDET 784 656 0 1 4 ED :BOTH OV :1 Proc :1 Pri :69 wirelabel 848 656 0 1 3 Name :W(75) COL :BLUE Monitor :Yes WIRE 816 656 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_LOGIC 400 592 3 0 6 Type :OR Inv :No Op :LSB Ninp :2 Proc :1 Pri :104 rtds_sharc_ctl_EDGEDET 464 624 0 1 4 ED :BOTH OV :1 Proc :1 Pri :68 rtds_sharc_ctl_EDGEDET 368 624 0 0 4 ED :0 -> 1 OV :1 Proc :1 Pri :103 WIRE 304 624 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 304 624 0 1 3 Name :partida COL :BLUE Monitor :Yes WIRE 496 624 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 528 624 0 1 3 Name :W(25) COL :BLUE Monitor :Yes wirelabel 528 528 0 1 3 Name :t1antes COL :BLUE Monitor :Yes rtds_BLUETEXT1 144 336 0 0 1 AL1 :SEQUENCIAMENTO DE PARTIDA COM DEGRAUS HIERARCHY 112 176 0 0 22 FCOL :BLACK BCOL :WHITE LW :1.0 DESC1 :Speed DESC2 :Control IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :36 x1 :-32 y1 :-32 x2 :32 y2 :32 canvasX :33 canvasY :41 canvasWidth :789 canvasHeight :517 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No WIRE 656 208 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 656 208 2 0 3 Name :w_g_pos COL :BLUE Monitor :Yes rtds_sharc_ctl_GAIN 400 208 0 0 3 K :1.2 Proc :1 Pri :79 wirelabel 464 208 0 0 3 Name :WPTerm COL :BLUE Monitor :Yes wirelabel 272 208 0 1 3 Name :W(75) COL :BLUE Monitor :Yes wirelabel 144 144 0 1 3 Name :WFil COL :BLUE Monitor :Yes rtds_sharc_ctl_SLIDER 80 48 0 0 5 Name :setpointW Init :0.06 Max :1 Min :0 Units :volts wirelabel 304 176 0 0 3 Name :WErr COL :BLUE Monitor :Yes rtds_sharc_ctl_CONSTANT 176 176 0 0 1 Val :0.0 rtds_sharc_ctl_REALPL 80 144 0 0 12 T :0.05 G :1 RST :No LIM :None TGD :No Xic :0.0 Yic :0.0 PItype :Fixed Tic :1.0 Gic :1.0 Proc :1 Pri :67 rtds_sharc_ctl_SIGSW 272 176 0 0 5 A :1 DPath :REAL Pos :A Proc :1 Pri :78 rtds_sharc_ctl_SUM3 208 144 2 1 7 Num :TWO IorF :REAL IN1 :+ IN2 :- IN3 :- Proc :1 Pri :77 WIRE 208 176 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 304 176 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_SUM3 592 208 2 1 7 Num :TWO IorF :REAL IN1 :+ IN2 :+ IN3 :- Proc :1 Pri :88 wirelabel 16 144 0 1 3 Name :W(pu) COL :BLUE Monitor :Yes WIRE 176 144 0 0 2 -32 -4 32 4 COL :RED LW :1.0 WIRE 48 144 0 1 2 0 -4 32 4 COL :RED LW :1.0 WIRE 208 80 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 208 48 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 208 48 2 0 3 Name :Wreq COL :BLUE Monitor :Yes WIRE 144 48 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 336 176 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 336 208 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 528 208 0 0 2 -96 -4 64 4 COL :RED LW :1.0 wirelabel 592 144 2 0 3 Name :WITerm COL :BLUE Monitor :Yes WIRE 592 144 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 592 176 1 0 2 -4 -32 4 0 COL :RED LW :1.0 rtds_sharc_ctl_INTGL 496 144 0 0 9 T :1 RST :No LIM :Internal Xic :0.0 Yic :0.0 PItype :Fixed Tic :1 Proc :1 Pri :87 WIRE 464 144 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_GAIN 400 144 0 0 3 K :0.1 Proc :1 Pri :86 WIRE 336 144 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 592 112 2 0 1 Val :1.1 rtds_sharc_ctl_CONSTANT 496 176 0 0 1 Val :0.0 rtds_sharc_ctl_RATELIMIT 176 48 0 1 6 ULim :0.5 LLIm :-0.5 Xic :0.0 Yic :0.0 Proc :1 Pri :25 rtds_BLUETEXT1 368 272 0 0 1 AL1 :PI de controle de velocidade HIERARCHY 48 240 0 0 22 FCOL :BLACK BCOL :WHITE LW :1.0 DESC1 :Hydraulics DESC2 :Units IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :39 x1 :-32 y1 :-32 x2 :32 y2 :32 canvasX :48 canvasY :52 canvasWidth :1312 canvasHeight :769 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No rtds_sharc_ctl_SIGSW 240 112 0 0 5 A :1 DPath :REAL Pos :A Proc :1 Pri :53 rtds_sharc_ctl_REALPL 336 112 0 0 12 T :5 G :1 RST :No LIM :None TGD :No Xic :0.0 Yic :0.0 PItype :Fixed Tic :1.0 Gic :1.0 Proc :1 Pri :55 rtds_sharc_ctl_COMPARE 432 112 0 0 9 LOG :A > B INPT :REAL OUTT :INTEGER Proc :1 Pri :58 IOAB :1 IOBA :0 FOAB :1.25 FOBA :-1.333 WIRE 400 144 1 0 2 -4 0 4 32 COL :RED LW :1.0 WIRE 272 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 368 176 0 0 1 Val :0.95 rtds_sharc_ctl_SRFF 176 208 0 0 4 ISTA :Q = 0 INV :High Proc :1 Pri :52 WIRE 208 176 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 240 144 1 0 2 -4 0 4 32 COL :RED LW :1.0 wirelabel 496 112 0 0 3 Name :UHOK COL :BLUE Monitor :Yes WIRE 464 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 176 112 0 0 1 Val :0.0 rtds_sharc_ctl_CONSTANT 176 80 0 0 1 Val :1.0 wirelabel 272 112 0 0 3 Name :UHStarted COL :BLUE Monitor :Yes rtds_sharc_ctl_PB 176 336 0 0 4 Name :StartUH Type :INTEGER VOn :1 VOff :0 rtds_sharc_ctl_PB 176 368 0 0 4 Name :StopUH Type :INTEGER VOn :1 VOff :0 wirelabel 240 336 0 0 3 Name :StartUH COL :BLUE Monitor :Yes wirelabel 240 368 0 0 3 Name :StopUH COL :BLUE Monitor :Yes WIRE 208 336 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 240 368 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 80 176 0 0 3 Name :S COL :BLUE Monitor :Yes wirelabel 80 240 0 0 3 Name :R COL :BLUE Monitor :Yes WIRE 112 176 0 0 2 -32 -4 32 4 COL :RED LW :1.0 WIRE 112 240 0 0 2 -32 -4 32 4 COL :RED LW :1.0 rtds_BLACKTEXT1 368 272 0 0 3 AL1 :Logica de entrada para partida e parada da unidade hidraulica COL :BLUE LOC :MIDDLE rtds_BLACKTEXT1 112 336 0 0 3 AL1 :Partida/Parada Local COL :BLUE LOC :MIDDLE rtds_BLACKTEXT1 336 336 0 0 3 AL1 :Partida/Parada Remoto COL :BLUE LOC :MIDDLE rtds_sharc_ctl_PB 400 336 0 0 4 Name :DigInStart Type :INTEGER VOn :1 VOff :0 rtds_sharc_ctl_PB 400 368 0 0 4 Name :DigInStop Type :INTEGER VOn :1 VOff :0 wirelabel 464 368 0 0 3 Name :DigInStop COL :BLUE Monitor :Yes wirelabel 464 336 0 0 3 Name :DigInStart COL :BLUE Monitor :Yes WIRE 432 336 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 432 368 0 0 2 0 -4 32 4 COL :RED LW :1.0 GROUP 688 368 0 0 0 3 WIRE 688 368 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 720 368 0 0 3 Name :Local/Rmto COL :BLUE Monitor :Yes rtds_sharc_ctl_SWITCH 656 368 0 0 7 Name :LocalRmto Init :Off Type :INTEGER VOn :1 VOff :0 Ton :ON Toff :OFF rtds_BLACKTEXT1 688 304 0 0 3 AL1 :Chave Local/Remoto COL :BLUE LOC :MIDDLE GROUP 368 592 0 0 0 38 rtds_sharc_ctl_LOGIC 272 624 0 0 6 Type :AND Inv :No Op :LSB Ninp :2 Proc :1 Pri :33 WIRE 304 624 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 560 624 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 336 688 1 0 2 -4 -64 4 32 COL :RED LW :1.0 WIRE 592 688 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 464 720 0 0 2 -128 -4 128 4 COL :RED LW :1.0 rtds_sharc_ctl_LOGIC 624 624 0 0 6 Type :OR Inv :No Op :LSB Ninp :2 Proc :1 Pri :51 wirelabel 656 624 2 0 3 Name :S COL :BLUE Monitor :Yes WIRE 304 496 1 0 2 -4 0 4 32 COL :RED LW :1.0 WIRE 432 496 0 0 2 -128 -4 128 4 COL :RED LW :1.0 rtds_sharc_ctl_LOGIC 592 496 0 0 6 Type :OR Inv :No Op :LSB Ninp :2 Proc :1 Pri :32 WIRE 624 496 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 656 496 2 0 3 Name :R COL :BLUE Monitor :Yes WIRE 368 592 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_NOT 400 656 0 0 3 Op :LSB Proc :1 Pri :31 rtds_sharc_ctl_LOGIC 464 656 0 0 6 Type :AND Inv :No Op :LSB Ninp :2 Proc :1 Pri :45 wirelabel 432 688 0 0 3 Name :DigInStart COL :BLUE Monitor :Yes WIRE 464 624 0 0 2 -64 -4 32 4 COL :RED LW :1.0 WIRE 400 592 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 464 560 0 0 2 -64 -4 32 4 COL :RED LW :1.0 wirelabel 496 528 2 0 3 Name :DigInStop COL :BLUE Monitor :Yes rtds_sharc_ctl_LOGIC 528 624 0 0 6 Type :AND Inv :No Op :LSB Ninp :2 Proc :1 Pri :50 rtds_sharc_ctl_LOGIC 528 528 0 0 6 Type :AND Inv :No Op :LSB Ninp :2 Proc :1 Pri :30 wirelabel 368 656 2 0 3 Name :DigInStop COL :BLUE Monitor :Yes WIRE 368 656 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 240 528 2 0 3 Name :StopUH COL :BLUE Monitor :Yes WIRE 272 592 0 0 2 -64 -4 64 4 COL :RED LW :1.0 rtds_sharc_ctl_NOT 336 592 0 0 3 Op :LSB Proc :1 Pri :29 wirelabel 176 688 0 0 3 Name :StartUH COL :BLUE Monitor :Yes rtds_sharc_ctl_LOGIC 208 656 0 0 6 Type :AND Inv :No Op :LSB Ninp :2 Proc :1 Pri :28 rtds_sharc_ctl_NOT 144 656 0 0 3 Op :LSB Proc :1 Pri :27 WIRE 112 656 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 208 592 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 208 624 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 208 560 0 0 2 -32 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_LOGIC 272 528 0 0 6 Type :AND Inv :No Op :LSB Ninp :2 Proc :1 Pri :26 wirelabel 176 560 0 0 3 Name :Local/Rmto COL :BLUE Monitor :Yes wirelabel 112 656 0 0 3 Name :StopUH COL :BLUE Monitor :Yes rtds_BLACKTEXT1 368 464 0 0 3 AL1 :Lógica combinatória de partida e parada, local e remoto COL :BLUE LOC :MIDDLE rtds_BLACKTEXT1 400 16 0 0 3 AL1 :Simulador da partida da Unidade Hidráulica COL :BLUE LOC :MIDDLE rtds_BLACKTEXT1 400 176 0 0 3 AL1 :Dinâmica da unidade hidraúlica COL :BLUE LOC :MIDDLE HIERARCHY 48 304 0 0 22 FCOL :BLACK BCOL :WHITE LW :1.0 DESC1 :Position DESC2 :Control IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :14 x1 :-32 y1 :-32 x2 :32 y2 :32 canvasX :39 canvasY :46 canvasWidth :713 canvasHeight :543 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No WIRE 176 144 0 0 2 -128 -4 96 4 COL :RED LW :1.0 wirelabel 48 144 0 0 3 Name :g COL :BLUE Monitor :Yes WIRE 80 208 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 48 208 0 0 3 Name :WGPOS COL :BLUE Monitor :Yes rtds_sharc_ctl_SUM3 272 176 2 1 7 Num :TWO IorF :REAL IN1 :+ IN2 :- IN3 :+ Proc :1 Pri :111 WIRE 240 176 0 0 2 -64 -4 32 4 COL :RED LW :1.0 WIRE 176 176 1 0 2 -4 0 4 32 COL :RED LW :1.0 rtds_sharc_ctl_REALPL 112 208 0 0 12 T :0.05 G :1 RST :No LIM :None TGD :No Xic :0.0 Yic :0.0 PItype :Fixed Tic :1.0 Gic :1.0 Proc :1 Pri :110 WIRE 368 176 0 0 2 -64 -4 32 4 COL :RED LW :1.0 wirelabel 560 176 0 0 3 Name :WGCMD COL :BLUE Monitor :Yes WIRE 528 176 0 0 2 -32 -4 32 4 COL :RED LW :1.0 GROUP 368 176 0 0 0 2 rtds_sharc_ctl_MUL 400 176 0 0 4 Num :TWO IorF :REAL Proc :1 Pri :112 rtds_sharc_ctl_IMPORT 368 208 2 1 2 Name :Kp Type :FLOAT WIRE 464 176 0 0 2 -32 -4 32 4 COL :RED LW :1.0 rtds_BLUETEXT1 304 48 0 0 1 AL1 :Controle de posicao do distribuidor HIERARCHY 48 368 0 0 22 FCOL :BLACK BCOL :WHITE LW :0.9 DESC1 :WG DESC2 :Dynamics IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :5 x1 :-32 y1 :-32 x2 :32 y2 :32 canvasX :46 canvasY :50 canvasWidth :839 canvasHeight :553 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No GROUP 208 176 0 0 0 3 GROUP 272 176 0 0 0 6 WIRE 240 176 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 304 208 1 0 2 -4 0 4 32 COL :RED LW :1.0 WIRE 336 112 1 0 2 -4 0 4 32 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 272 240 0 0 1 Val :0.0 rtds_sharc_ctl_CONSTANT 304 112 0 0 1 Val :1.1 rtds_sharc_ctl_LIMITS 208 176 0 1 5 IorF :REAL ULim :1.0 LLim :-1.0 Proc :1 Pri :113 rtds_sharc_ctl_INTGL 272 176 0 0 9 T :1.0 RST :No LIM :Internal Xic :0.0 Yic :0.0 PItype :Fixed Tic :1 Proc :1 Pri :109 WIRE 144 176 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 144 176 0 0 3 Name :WGCMD COL :BLUE Monitor :Yes WIRE 368 176 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 368 176 0 0 3 Name :WGPOS COL :BLUE Monitor :Yes rtds_BLUETEXT1 240 48 0 0 1 AL1 :Dinâmica de posicionamento do distribuidor HIERARCHY 48 432 2 0 22 FCOL :BLACK BCOL :WHITE LW :1.0 DESC1 : DESC2 :Turbine IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :60 x1 :-32 y1 :-32 x2 :32 y2 :32 canvasX :46 canvasY :42 canvasWidth :1262 canvasHeight :511 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No wirelabel 1008 336 0 0 3 Name :W COL :BLUE Monitor :Yes rtds_sharc_ctl_SUM3 528 112 2 1 7 Num :TWO IorF :REAL IN1 :- IN2 :+ IN3 :- Proc :1 Pri :118 rtds_sharc_ctl_XDIVY 304 80 0 0 4 DBZ :Halt Val :1e8 Proc :1 Pri :115 WIRE 336 80 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_XPOWN 400 80 0 0 3 N :2 Proc :1 Pri :117 WIRE 496 80 0 0 2 -64 -4 32 4 COL :RED LW :1.0 WIRE 272 80 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 464 176 1 0 2 -4 -96 4 64 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 496 176 3 0 1 Val :1.0 WIRE 304 112 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 464 80 2 1 3 Name :H COL :BLUE Monitor :Yes WIRE 560 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 496 112 2 0 3 Name :Ho COL :BLUE Monitor :Yes WIRE 496 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 496 112 1 0 2 -4 0 4 32 COL :RED LW :1.0 wirelabel 304 112 0 0 3 Name :G COL :BLUE Monitor :Yes rtds_sharc_ctl_GAIN 240 112 0 0 3 K :1.136 Proc :1 Pri :99 WIRE 176 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_DYNLIMS 176 112 0 1 3 IorF :REAL Proc :1 Pri :98 rtds_sharc_ctl_CONSTANT 144 176 3 0 1 Val :0.0599 rtds_sharc_ctl_CONSTANT 176 48 1 0 1 Val :1.1 WIRE 272 48 1 0 2 -4 0 4 32 COL :RED LW :1.0 WIRE 656 240 0 0 2 -192 -4 160 4 COL :RED LW :1.0 WIRE 496 48 0 0 2 -224 -4 192 4 COL :RED LW :1.0 rtds_sharc_ctl_XDIVY 912 144 0 0 4 DBZ :Halt Val :1e8 Proc :1 Pri :121 WIRE 912 240 1 0 2 -4 -64 4 32 COL :RED LW :1.0 WIRE 784 144 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_MUL 816 144 0 0 4 Num :TWO IorF :REAL Proc :1 Pri :120 WIRE 816 208 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 880 144 0 0 2 -32 -4 32 4 COL :RED LW :1.0 wirelabel 880 144 0 0 3 Name :Pm COL :BLUE Monitor :Yes WIRE 976 144 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 848 272 0 0 2 -96 -4 64 4 COL :RED LW :1.0 wirelabel 816 272 0 0 3 Name :Wp COL :BLUE Monitor :Yes WIRE 912 336 0 0 2 -128 -4 96 4 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 816 368 0 1 1 Val :376.991 WIRE 720 112 0 0 2 -32 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_SUM3 752 144 2 1 7 Num :TWO IorF :REAL IN1 :+ IN2 :- IN3 :- Proc :1 Pri :116 WIRE 720 144 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_MINMAX 720 272 0 0 4 IorF :REAL Mode :Maximum Proc :1 Pri :63 WIRE 752 336 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_XDIVY 784 336 0 1 4 DBZ :Halt Val :1e8 Proc :1 Pri :62 rtds_sharc_ctl_CONSTANT 720 176 3 0 1 Val :0.0680464 wirelabel 720 144 2 0 3 Name :Unl COL :BLUE Monitor :Yes wirelabel 688 112 0 0 3 Name :U COL :BLUE Monitor :Yes WIRE 688 80 1 0 2 -4 -32 4 32 COL :RED LW :1.0 rtds_sharc_ctl_INTGL 624 112 0 0 9 T :0.436 RST :No LIM :None Xic :0.0 Yic :0.0 PItype :Fixed Tic :1 Proc :1 Pri :119 WIRE 720 304 1 0 2 -4 0 4 32 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 656 272 0 0 1 Val :0.1 wirelabel 688 272 0 0 3 Name :0.1W COL :BLUE Monitor :Yes WIRE 688 272 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 720 336 0 0 3 Name :W(pu) COL :BLUE Monitor :Yes WIRE 112 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 112 112 0 0 3 Name :WGPOS COL :BLUE Monitor :Yes rtds_sharc_ctl_SIGSW 1008 176 0 0 5 A :0 DPath :REAL Pos :A Proc :1 Pri :114 rtds_sharc_ctl_CONSTANT 976 208 3 0 1 Val :0.00 WIRE 1072 176 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 1072 176 0 0 3 Name :Tm COL :BLUE Monitor :Yes rtds_sharc_ctl_SWITCH 1040 208 2 0 7 Name :PARAPLEASD Init :Off Type :INTEGER VOn :1 VOff :0 Ton :ON Toff :OFF rtds_BLUETEXT1 208 272 0 0 1 AL1 :Dinâmica de conduto forçado - não linear com perdas HIERARCHY 112 368 0 0 22 FCOL :BLACK BCOL :WHITE LW :1.0 DESC1 :Brake DESC2 :Control IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :20 x1 :-32 y1 :-32 x2 :32 y2 :32 canvasX :34 canvasY :44 canvasWidth :415 canvasHeight :454 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No rtds_sharc_ctl_CONSTANT 112 80 0 0 1 Val :0.02 rtds_sharc_ctl_CONSTANT 112 112 0 0 1 Val :0.2 WIRE 144 80 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 144 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_SIGSW 208 112 0 0 5 A :0 DPath :REAL Pos :A Proc :1 Pri :44 wirelabel 208 144 0 0 3 Name :Brake COL :BLUE Monitor :Yes WIRE 240 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 272 112 0 0 3 Name :MacDump COL :BLUE Monitor :Yes rtds_sharc_ctl_MONO 144 240 0 0 7 PN :Rising TM :Fixed LOT :0.0 OT :1 OR :0 Proc :1 Pri :24 rtds_sharc_ctl_PB 48 240 0 0 4 Name :BrakeOn Type :INTEGER VOn :1 VOff :0 wirelabel 304 240 0 0 3 Name :Brake COL :BLUE Monitor :Yes rtds_sharc_ctl_SRFF 240 272 0 0 4 ISTA :Q = 0 INV :High Proc :1 Pri :43 WIRE 272 240 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 176 240 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 176 304 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_PB 48 304 0 0 4 Name :BrakeOff Type :INTEGER VOn :1 VOff :0 rtds_sharc_ctl_MONO 144 304 0 0 7 PN :Rising TM :Fixed LOT :0.0 OT :1 OR :0 Proc :1 Pri :23 WIRE 80 240 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 80 304 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_BLUETEXT1 176 16 0 0 1 AL1 :Lógica do freio do gerador rtds_sharc_sld_BUSLABEL 976 464 0 0 29 BName :BUS2 NA :N4 NB :N5 NC :N6 VRate :230.0 daout :No COL :RED LW :3 COLA :ORANGE COLB :RED COLC :RED Vi :1.0 Ai :0.0 Type :PQ BUS Vd :1.0 Ad :1.0 Dis1 :No A1PosX :32 C1PosX :-32 Num :2 prcA :None chnA :1 prcB :None chnB :1 prcC :None chnC :1 scl :187.79 damod :align Loadflow_RST :BUS: $Num, Vd, Ad lf_rtds_sharc_sld_TLINE 1232 720 0 0 102 Name :TL62SE Tnam1 :TL62 endsr :SENDING numc :6 lnbkr :No enbrl :No dirct :In ctpo :Yes dirpq :In pctpo :Yes tcnpq :0.01 bkrof :1.0e6 bkron :0.1 stat1 :Closed stat2 :Closed holdi :0.0 resi :0.0 indc :3. swdnm :TL1OCSE mon1 :No mon2 :No mon3 :No mon4 :No mon5 :No mon6 :No mon11 :No mon12 :No mon13 :No mon14 :No mon15 :No mon16 :No mon21 :No mon22 :No mon23 :No mon7 :No mon8 :No mon9 :No mon10 :No mon17 :No mon18 :No mon19 :No mon20 :No mon24 :No mon25 :No monv1 :No monv2 :No monv3 :No monv4 :No monv5 :No monv6 :No nam1 :CRT1SE nam2 :CRT2SE nam3 :CRT3SE nam4 :CRT4SE nam5 :CRT5SE nam6 :CRT6SE nam11 :CRT7SE nam12 :CRT8SE nam13 :CRT9SE nam14 :CRT10SE nam15 :CRT11SE nam16 :CRT12SE nam21 :CRTASE nam22 :CRTBSE nam23 :CRTCSE nam7 :PSE1 nam8 :QSE1 nam9 :PL2SE nam10 :QL2SE nam17 :PL3SE nam18 :QL3SE nam19 :PL4SE nam20 :QL4SE nam24 :PTSE nam25 :QTSE namv1 :V1SE namv2 :V2SE namv3 :V3SE namv4 :V4SE namv5 :V5SE namv6 :V6SE LENGTH :250000.0 ZM :792.8978,322.5919,322.5919,322.5919,322.5919,322.5919 TM :1.411581,0.8749667,0.8749667,0.8749667,0.8749667,0.8749667 R :7.399427E-4,2.32431E-5,2.32431E-5,2.32431E-5,2.32431E-5,2.32431E-5 TI :0.4082483,0.9128709,0.0,0.0,0.0,0.0,0.4082483,-0.1825742,0.8944272,0.0,0.0,0.0,0.4082483,-0.1825742,-0.2236068,0.8660255,0.0,0.0,0.4082483,-0.1825742,-0.2236068,-0.2886752,0.8164966,0.0,0.4082483,-0.1825742,-0.2236068,-0.2886752,-0.4082483,0.7071068,0.4082483,-0.1825742,-0.2236068,-0.2886752,-0.4082483,-0.7071068 PERCENT_OF_LINE :100.0 tlb :TCTline A1PosY :-32 C1PosY :32 A2PosY :64 C2PosY :128 A3PosY :160 C3PosY :224 A4PosY :256 C4PosY :320 enDebug :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 BUS 1072 720 0 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-96 y1L1 :-32 x2L1 :64 y2L1 :-32 x1L2 :-96 y1L2 :0 x2L2 :96 y2L2 :0 x1L3 :-96 y1L3 :32 x2L3 :128 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :1 L3ArcAtEnd1 :0 L3ArcAtEnd2 :1 BUS 1840 720 0 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-224 y1L1 :-32 x2L1 :224 y2L1 :-32 x1L2 :-224 y1L2 :0 x2L2 :224 y2L2 :0 x1L3 :-224 y1L3 :32 x2L3 :224 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 lf_rtds_sharc_sld_TLINE 1552 720 0 1 102 Name :TL62RE Tnam1 :TL62 endsr :RECEIVING numc :6 lnbkr :No enbrl :No dirct :In ctpo :Yes dirpq :In pctpo :Yes tcnpq :0.01 bkrof :1.0e6 bkron :0.1 stat1 :Closed stat2 :Closed holdi :0.0 resi :0.0 indc :3. swdnm :TL1OCRE mon1 :No mon2 :No mon3 :No mon4 :No mon5 :No mon6 :No mon11 :No mon12 :No mon13 :No mon14 :No mon15 :No mon16 :No mon21 :No mon22 :No mon23 :No mon7 :No mon8 :No mon9 :No mon10 :No mon17 :No mon18 :No mon19 :No mon20 :No mon24 :No mon25 :No monv1 :No monv2 :No monv3 :No monv4 :No monv5 :No monv6 :No nam1 :CRT1SE nam2 :CRT2SE nam3 :CRT3SE nam4 :CRT4SE nam5 :CRT5SE nam6 :CRT6SE nam11 :CRT7SE nam12 :CRT8SE nam13 :CRT9SE nam14 :CRT10SE nam15 :CRT11SE nam16 :CRT12SE nam21 :CRTASE nam22 :CRTBSE nam23 :CRTCSE nam7 :PRE1 nam8 :QRE1 nam9 :PL2SE nam10 :QL2SE nam17 :PL3SE nam18 :QL3SE nam19 :PL4SE nam20 :QL4SE nam24 :PTSE nam25 :QTSE namv1 :V1SE namv2 :V2SE namv3 :V3SE namv4 :V4SE namv5 :V5SE namv6 :V6SE LENGTH :250000.0 ZM :792.8978,322.5919,322.5919,322.5919,322.5919,322.5919 TM :1.411581,0.8749667,0.8749667,0.8749667,0.8749667,0.8749667 R :7.399427E-4,2.32431E-5,2.32431E-5,2.32431E-5,2.32431E-5,2.32431E-5 TI :0.4082483,0.9128709,0.0,0.0,0.0,0.0,0.4082483,-0.1825742,0.8944272,0.0,0.0,0.0,0.4082483,-0.1825742,-0.2236068,0.8660255,0.0,0.0,0.4082483,-0.1825742,-0.2236068,-0.2886752,0.8164966,0.0,0.4082483,-0.1825742,-0.2236068,-0.2886752,-0.4082483,0.7071068,0.4082483,-0.1825742,-0.2236068,-0.2886752,-0.4082483,-0.7071068 PERCENT_OF_LINE :100.0 tlb :TCTline A1PosY :-32 C1PosY :32 A2PosY :64 C2PosY :128 A3PosY :160 C3PosY :224 A4PosY :256 C4PosY :320 enDebug :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 BUS 1840 816 0 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-96 y1L1 :-32 x2L1 :96 y2L1 :-32 x1L2 :-96 y1L2 :0 x2L2 :96 y2L2 :0 x1L3 :-96 y1L3 :32 x2L3 :96 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 BUS 2000 816 0 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-64 y1L1 :-32 x2L1 :64 y2L1 :-32 x1L2 :-64 y1L2 :0 x2L2 :64 y2L2 :0 x1L3 :-64 y1L3 :32 x2L3 :64 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 BUS 1680 816 0 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-64 y1L1 :-32 x2L1 :64 y2L1 :-32 x1L2 :-64 y1L2 :0 x2L2 :64 y2L2 :0 x1L3 :-64 y1L3 :32 x2L3 :64 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 lf_rtds_sharc_sld_TLINE 2128 720 0 0 102 Name :TL61SE Tnam1 :TL61 endsr :SENDING numc :6 lnbkr :No enbrl :Yes dirct :In ctpo :Yes dirpq :In pctpo :Yes tcnpq :0.01 bkrof :1.0e6 bkron :0.1 stat1 :Closed stat2 :Open holdi :0.0 resi :0.0 indc :3. swdnm :TL1OCSE mon1 :No mon2 :No mon3 :No mon4 :No mon5 :No mon6 :No mon11 :No mon12 :No mon13 :No mon14 :No mon15 :No mon16 :No mon21 :No mon22 :No mon23 :No mon7 :No mon8 :No mon9 :No mon10 :No mon17 :No mon18 :No mon19 :No mon20 :No mon24 :No mon25 :No monv1 :No monv2 :No monv3 :No monv4 :No monv5 :No monv6 :No nam1 :CRT1SE nam2 :CRT2SE nam3 :CRT3SE nam4 :CRT4SE nam5 :CRT5SE nam6 :CRT6SE nam11 :CRT7SE nam12 :CRT8SE nam13 :CRT9SE nam14 :CRT10SE nam15 :CRT11SE nam16 :CRT12SE nam21 :CRTASE nam22 :CRTBSE nam23 :CRTCSE nam7 :PSE1 nam8 :QSE1 nam9 :PL2SE nam10 :QL2SE nam17 :PL3SE nam18 :QL3SE nam19 :PL4SE nam20 :QL4SE nam24 :PTSE nam25 :QTSE namv1 :V1SE namv2 :V2SE namv3 :V3SE namv4 :V4SE namv5 :V5SE namv6 :V6SE LENGTH :250000.0 ZM :792.8978,322.5919,322.5919,322.5919,322.5919,322.5919 TM :1.411581,0.8749667,0.8749667,0.8749667,0.8749667,0.8749667 R :7.399427E-4,2.32431E-5,2.32431E-5,2.32431E-5,2.32431E-5,2.32431E-5 TI :0.4082483,0.9128709,0.0,0.0,0.0,0.0,0.4082483,-0.1825742,0.8944272,0.0,0.0,0.0,0.4082483,-0.1825742,-0.2236068,0.8660255,0.0,0.0,0.4082483,-0.1825742,-0.2236068,-0.2886752,0.8164966,0.0,0.4082483,-0.1825742,-0.2236068,-0.2886752,-0.4082483,0.7071068,0.4082483,-0.1825742,-0.2236068,-0.2886752,-0.4082483,-0.7071068 PERCENT_OF_LINE :100.0 tlb :TCTline A1PosY :-32 C1PosY :32 A2PosY :64 C2PosY :128 A3PosY :160 C3PosY :224 A4PosY :256 C4PosY :320 enDebug :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 lf_rtds_sharc_sld_TLINE 2448 720 0 1 102 Name :TL61RE Tnam1 :TL61 endsr :RECEIVING numc :6 lnbkr :No enbrl :No dirct :In ctpo :Yes dirpq :In pctpo :Yes tcnpq :0.01 bkrof :1.0e6 bkron :0.1 stat1 :Closed stat2 :Open holdi :0.0 resi :0.0 indc :3. swdnm :TL1OCRE mon1 :No mon2 :No mon3 :No mon4 :No mon5 :No mon6 :No mon11 :No mon12 :No mon13 :No mon14 :No mon15 :No mon16 :No mon21 :No mon22 :No mon23 :No mon7 :No mon8 :No mon9 :No mon10 :No mon17 :No mon18 :No mon19 :No mon20 :No mon24 :No mon25 :No monv1 :No monv2 :No monv3 :No monv4 :No monv5 :No monv6 :No nam1 :CRT1SE nam2 :CRT2SE nam3 :CRT3SE nam4 :CRT4SE nam5 :CRT5SE nam6 :CRT6SE nam11 :CRT7SE nam12 :CRT8SE nam13 :CRT9SE nam14 :CRT10SE nam15 :CRT11SE nam16 :CRT12SE nam21 :CRTASE nam22 :CRTBSE nam23 :CRTCSE nam7 :PRE1 nam8 :QRE1 nam9 :PL2SE nam10 :QL2SE nam17 :PL3SE nam18 :QL3SE nam19 :PL4SE nam20 :QL4SE nam24 :PTSE nam25 :QTSE namv1 :V1SE namv2 :V2SE namv3 :V3SE namv4 :V4SE namv5 :V5SE namv6 :V6SE LENGTH :250000.0 ZM :792.8978,322.5919,322.5919,322.5919,322.5919,322.5919 TM :1.411581,0.8749667,0.8749667,0.8749667,0.8749667,0.8749667 R :7.399427E-4,2.32431E-5,2.32431E-5,2.32431E-5,2.32431E-5,2.32431E-5 TI :0.4082483,0.9128709,0.0,0.0,0.0,0.0,0.4082483,-0.1825742,0.8944272,0.0,0.0,0.0,0.4082483,-0.1825742,-0.2236068,0.8660255,0.0,0.0,0.4082483,-0.1825742,-0.2236068,-0.2886752,0.8164966,0.0,0.4082483,-0.1825742,-0.2236068,-0.2886752,-0.4082483,0.7071068,0.4082483,-0.1825742,-0.2236068,-0.2886752,-0.4082483,-0.7071068 PERCENT_OF_LINE :100.0 tlb :TCTline A1PosY :-32 C1PosY :32 A2PosY :64 C2PosY :128 A3PosY :160 C3PosY :224 A4PosY :256 C4PosY :320 enDebug :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 BUS 2640 720 0 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-96 y1L1 :-32 x2L1 :128 y2L1 :-32 x1L2 :-128 y1L2 :0 x2L2 :128 y2L2 :0 x1L3 :-160 y1L3 :32 x2L3 :128 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :1 L2ArcAtEnd2 :0 L3ArcAtEnd1 :1 L3ArcAtEnd2 :0 BUS 2736 816 0 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :0 y1L1 :-32 x2L1 :64 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :64 y2L2 :0 x1L3 :-64 y1L3 :32 x2L3 :64 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :1 L2ArcAtEnd2 :0 L3ArcAtEnd1 :1 L3ArcAtEnd2 :0 BUS 2800 624 2 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-64 y1L1 :-32 x2L1 :32 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :32 y2L2 :0 x1L3 :0 y1L3 :32 x2L3 :32 y2L3 :32 L1ArcAtEnd1 :1 L1ArcAtEnd2 :0 L2ArcAtEnd1 :1 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 BUS 2768 816 3 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-256 y1L1 :-32 x2L1 :256 y2L1 :-32 x1L2 :-256 y1L2 :0 x2L2 :256 y2L2 :0 x1L3 :-256 y1L3 :32 x2L3 :256 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 lf_rtds_sharc_sld_SRC 2864 624 0 1 105 Name :src Type :R Tc :0.05 ZSeq :No Imp :RRL Values DynmImp :Static srcBrk :No WvType :AC Sctrl :RunTime Spec :Behind Impedance R1s :1.0 R1p :1.0 L1p :0.1 R0p :1.0 L0p :0.1 ImpCtlSrc :RunTime R2signalCC :R1s R1signalCC :R1p L1signalCC :L1p R0signalCC :R0 L0signalCC :L0 Tcc :1 AorM :Automatic Aprc :Either CARD :1 Rprc :A AM :NO CORE :1 ZType :R//L SMod :Internal Es :230.0 F0 :60.0 Ph :0.0 AFmod :Frequency Esm :0.1 F0m :1.0 Phm :0.0 IMod :Fmod AMmod :Amod NHarm :1 HN1 :2 Mag1 :0.05 Ph1 :0.0 HN2 :2 Mag2 :0.05 Ph2 :0.0 HN3 :2 Mag3 :0.05 Ph3 :0.0 HN4 :2 Mag4 :0.05 Ph4 :0.0 vBase :230.0 mvaBase :100.0 Et :1.0 Pht :0.0 NOTE1 : NOTE2 : P :-785.408799 Q :177.924802 Pt :100.0 Qt :50.0 Esd :100.0 F :60.0 Z1 :1.0 Phi1 :80.0 RN :2.0 Z0 :1.0 Phi0 :80.0 ieee2 :ieee Pmon :No Qmon :No MLoc :Terminal Tcp :0.0 Imon :No Vmon :No IMPmon :No Pnam :P Qnam :Q IAnam :IA IBnam :IB ICnam :IC VAnam :VA VBnam :VB VCnam :VC L0nam :L0mon R0nam :R0mon R1Snam :R1Smon R1Pnam :R1Pmon L1Pnam :L1Pmon CNVGnam :Converged Tf :0.10 Rf :0.50 A1PosY :32 C1PosY :-32 LFIdent :2 TrigSigCC :ImpTrig brkOpnRes :1.0e6 brkClsRes :1.0e-4 stat :Closed swdnm :SBKWORD Abit :1 Bbit :1 Cbit :1 Loadflow_RST :SOURCE: $LFIdent, Es, Ph, P, Q ground 2896 624 2 1 0 rtds_sharc_sld_BUSLABEL 2768 560 0 1 29 BName :BUS5 NA :N13 NB :N14 NC :N15 VRate :230.0 daout :No COL :RED LW :3 COLA :ORANGE COLB :RED COLC :RED Vi :1.0 Ai :0.0 Type :SLACK Vd :1.0 Ad :1.0 Dis1 :No A1PosX :32 C1PosX :-32 Num :5 prcA :None chnA :1 prcB :None chnB :1 prcC :None chnC :1 scl :187.79 damod :align Loadflow_RST :BUS: $Num, Vd, Ad BUS 2608 816 0 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-64 y1L1 :-32 x2L1 :96 y2L1 :-32 x1L2 :-64 y1L2 :0 x2L2 :96 y2L2 :0 x1L3 :-64 y1L3 :32 x2L3 :96 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 BUS 1072 816 0 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-96 y1L1 :-32 x2L1 :64 y2L1 :-32 x1L2 :-96 y1L2 :0 x2L2 :96 y2L2 :0 x1L3 :-96 y1L3 :32 x2L3 :128 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :1 L3ArcAtEnd1 :0 L3ArcAtEnd2 :1 BUS 2224 976 2 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-32 y1L1 :-32 x2L1 :64 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :32 y2L2 :0 x1L3 :-32 y1L3 :32 x2L3 :0 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :1 L2ArcAtEnd1 :0 L2ArcAtEnd2 :1 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 HIERARCHY 1808 1232 2 0 22 FCOL :BLACK BCOL :WHITE LW :1.0 DESC1 :LOGIC DESC2 :L-G FAULT IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :41 x1 :-32 y1 :-32 x2 :32 y2 :32 canvasX :35 canvasY :55 canvasWidth :878 canvasHeight :625 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No WIRE 144 144 1 0 2 -4 -96 4 96 COL :RED LW :1.0 rtds_sharc_ctl_MONO 208 48 0 0 7 PN :Rising TM :Fixed LOT :0.1 OT :1 OR :0 Proc :1 Pri :7 WIRE 144 48 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 272 48 0 0 2 -32 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_MUL 304 48 0 0 4 Num :TWO IorF :INTEGER Proc :1 Pri :41 rtds_sharc_ctl_DIAL 272 80 0 0 34 Name :FLTTYPE Type :INTEGER Pos :7 Init :1 IP1 :1 IP2 :2 IP3 :3 IP4 :4 IP5 :5 IP6 :6 IP7 :7 IP8 :8 IP9 :9 IP10 :10 FP1 :1.0 FP2 :2.0 FP3 :3.0 FP4 :4.0 FP5 :5.0 FP6 :6.0 FP7 :7.0 FP8 :8.0 FP9 :9.0 FP10 :10.0 HEX1 :01 HEX2 :02 HEX3 :03 HEX4 :04 HEX5 :05 HEX6 :06 HEX7 :07 HEX8 :08 HEX9 :09 HEX10 :0A WIRE 144 144 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_PB 80 144 0 0 4 Name :FLTSEQ Type :INTEGER VOn :1 VOff :0 rtds_sharc_ctl_MONO 208 144 0 0 7 PN :Rising TM :Variable LOT :0.02 OT :1 OR :0 Proc :1 Pri :6 rtds_sharc_ctl_MONO 304 144 0 0 7 PN :Falling TM :Fixed LOT :0.1 OT :1 OR :0 Proc :1 Pri :40 rtds_sharc_ctl_MONO 208 240 0 0 7 PN :Rising TM :Variable LOT :0.02 OT :1 OR :0 Proc :1 Pri :5 rtds_sharc_ctl_MONO 304 240 0 0 7 PN :Falling TM :Fixed LOT :0.1 OT :1 OR :0 Proc :1 Pri :39 WIRE 176 144 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 176 240 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 272 144 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 272 240 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_SRFF 464 208 0 0 4 ISTA :Q = 0 INV :High Proc :1 Pri :48 rtds_sharc_ctl_SRFF 464 112 0 0 4 ISTA :Q = 0 INV :High Proc :1 Pri :47 WIRE 528 80 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 528 176 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 368 48 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 368 48 0 0 3 Name :LGFLT COL :BLUE Monitor :Yes wirelabel 528 80 0 0 3 Name :BRK2 COL :BLUE Monitor :Yes wirelabel 528 176 0 0 3 Name :BRK3 COL :BLUE Monitor :Yes WIRE 368 240 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 368 144 0 0 2 -32 -4 0 4 COL :RED LW :1.0 jumper 176 240 3 0 2 COL :RED LW :1.0 WIRE 176 208 1 0 2 -4 -32 4 0 COL :RED LW :1.0 WIRE 176 304 1 0 2 -4 -32 4 0 COL :RED LW :1.0 WIRE 176 304 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_SLIDER 112 304 0 0 5 Name :FCLEAR Init :0.05 Max :1 Min :0 Units :volts WIRE 400 176 0 0 2 -32 -4 32 4 COL :RED LW :1.0 WIRE 400 80 0 0 2 -32 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_PB 336 304 0 0 4 Name :ReClose Type :INTEGER VOn :1 VOff :0 WIRE 400 304 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 432 240 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 368 208 1 0 2 -4 -32 4 32 COL :RED LW :1.0 jumper 400 176 1 0 2 COL :RED LW :1.0 WIRE 400 272 1 0 2 -4 -64 4 32 COL :RED LW :1.0 WIRE 432 144 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 368 112 1 0 2 -4 -32 4 32 COL :RED LW :1.0 rtds_sharc_sld_FAULT 1680 1200 1 0 51 Type :Line-Ground Ag :Yes Bg :Yes Cg :Yes Agnam :AG AgRon :0.1 Agholdi :0.0 Asig :LGFLT Abit :1 Amon :Yes IAgnam :Iag Bgnam :BG BgRon :0.1 Bgholdi :0.0 Bsig :LGFLT Bbit :2 Bmon :Yes IBgnam :Ibg Cgnam :CG CgRon :0.1 Cgholdi :0.0 Csig :LGFLT Cbit :3 Cmon :Yes ICgnam :Icg AB :Yes BC :Yes CA :Yes ABnam :AB ABRon :0.1 ABholdi :0.0 ABsig :FLT ABbit :1 ABmon :No IABnam :Iag BCnam :BC BCRon :0.1 BCholdi :0.0 BCsig :FLT BCbit :1 BCmon :No IBCnam :Iag CAnam :CA CARon :0.1 CAholdi :0.0 CAsig :FLT CAbit :1 CAmon :No ICAnam :Iag A1PosY :32 C1PosY :-32 BUS 1680 1136 3 1 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-64 y1L1 :-32 x2L1 :32 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :32 y2L2 :0 x1L3 :0 y1L3 :32 x2L3 :32 y2L3 :32 L1ArcAtEnd1 :1 L1ArcAtEnd2 :0 L2ArcAtEnd1 :1 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 lf_rtds_sharc_sld_TL16CAL 1424 976 0 0 26 Name :TL21 Dnm1 :SCTline cntyp :Bergeron pptline :No Icon :Large elimCrtLag :No exclu :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 rdData :tlb/cbl note1 : note2 : pp_var :100.0 hmnpp :(pp_var)% frcpi :No alwpi :No raistt :ERROR Ph :Yes final_tl_berg_format_tlbclb_tloclo_or_tlines_012 :0 final_tl_berg_percentage_line_length :0 final_tl_constants_file_name_cw_sufx :0 Type :TLINE enDebug :No lf_rtds_sharc_sld_TLINE 1552 1104 0 1 102 Name :TL21RE Tnam1 :TL21 endsr :RECEIVING numc :3 lnbkr :No enbrl :Yes dirct :In ctpo :Yes dirpq :Out pctpo :Yes tcnpq :0.01 bkrof :1.0e6 bkron :0.1 stat1 :Closed stat2 :Closed holdi :0.0 resi :0.0 indc :3. swdnm :TL1OCRE mon1 :No mon2 :No mon3 :No mon4 :No mon5 :No mon6 :No mon11 :No mon12 :No mon13 :No mon14 :No mon15 :No mon16 :No mon21 :No mon22 :No mon23 :No mon7 :No mon8 :No mon9 :No mon10 :No mon17 :No mon18 :No mon19 :No mon20 :No mon24 :No mon25 :No monv1 :No monv2 :No monv3 :No monv4 :No monv5 :No monv6 :No nam1 :CRT1SE nam2 :CRT2SE nam3 :CRT3SE nam4 :CRT4SE nam5 :CRT5SE nam6 :CRT6SE nam11 :CRT7SE nam12 :CRT8SE nam13 :CRT9SE nam14 :CRT10SE nam15 :CRT11SE nam16 :CRT12SE nam21 :CRTASE nam22 :CRTBSE nam23 :CRTCSE nam7 :PRE1 nam8 :QRE1 nam9 :PL2SE nam10 :QL2SE nam17 :PL3SE nam18 :QL3SE nam19 :PL4SE nam20 :QL4SE nam24 :PTSE nam25 :QTSE namv1 :V1SE namv2 :V2SE namv3 :V3SE namv4 :V4SE namv5 :V5SE namv6 :V6SE LENGTH :250000.0 ZM :650.951,293.036,293.036 TM :1.250734,0.8524767,0.8524767 R :3.618376E-4,1.854662E-5,1.854662E-5 TI :0.5773503,0.8164966,0.0,0.5773503,-0.4082483,0.7071068,0.5773503,-0.4082483,-0.7071068 PERCENT_OF_LINE :100.0 tlb :SCTline A1PosY :-32 C1PosY :32 A2PosY :64 C2PosY :128 A3PosY :160 C3PosY :224 A4PosY :256 C4PosY :320 enDebug :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 lf_rtds_sharc_sld_TLINE 1808 1104 0 0 102 Name :TL22SE Tnam1 :TL22 endsr :SENDING numc :3 lnbkr :No enbrl :Yes dirct :In ctpo :Yes dirpq :In pctpo :Yes tcnpq :0.01 bkrof :1.0e6 bkron :0.1 stat1 :Closed stat2 :Closed holdi :0.0 resi :0.0 indc :3. swdnm :TL1OCSE mon1 :No mon2 :No mon3 :No mon4 :No mon5 :No mon6 :No mon11 :No mon12 :No mon13 :No mon14 :No mon15 :No mon16 :No mon21 :No mon22 :No mon23 :No mon7 :No mon8 :No mon9 :No mon10 :No mon17 :No mon18 :No mon19 :No mon20 :No mon24 :No mon25 :No monv1 :No monv2 :No monv3 :No monv4 :No monv5 :No monv6 :No nam1 :CRT1SE nam2 :CRT2SE nam3 :CRT3SE nam4 :CRT4SE nam5 :CRT5SE nam6 :CRT6SE nam11 :CRT7SE nam12 :CRT8SE nam13 :CRT9SE nam14 :CRT10SE nam15 :CRT11SE nam16 :CRT12SE nam21 :CRTASE nam22 :CRTBSE nam23 :CRTCSE nam7 :PSE1 nam8 :QSE1 nam9 :PL2SE nam10 :QL2SE nam17 :PL3SE nam18 :QL3SE nam19 :PL4SE nam20 :QL4SE nam24 :PTSE nam25 :QTSE namv1 :V1SE namv2 :V2SE namv3 :V3SE namv4 :V4SE namv5 :V5SE namv6 :V6SE LENGTH :250000.0 ZM :650.951,293.036,293.036 TM :1.250734,0.8524767,0.8524767 R :3.618376E-4,1.854662E-5,1.854662E-5 TI :0.5773503,0.8164966,0.0,0.5773503,-0.4082483,0.7071068,0.5773503,-0.4082483,-0.7071068 PERCENT_OF_LINE :100.0 tlb :SCTline A1PosY :-32 C1PosY :32 A2PosY :64 C2PosY :128 A3PosY :160 C3PosY :224 A4PosY :256 C4PosY :320 enDebug :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 lf_rtds_sharc_sld_TLINE 2064 1104 0 1 102 Name :TL22RE Tnam1 :TL22 endsr :RECEIVING numc :3 lnbkr :No enbrl :Yes dirct :In ctpo :Yes dirpq :Out pctpo :Yes tcnpq :0.01 bkrof :1.0e6 bkron :0.1 stat1 :Closed stat2 :Closed holdi :0.0 resi :0.0 indc :3. swdnm :TL1OCRE mon1 :No mon2 :No mon3 :No mon4 :No mon5 :No mon6 :No mon11 :No mon12 :No mon13 :No mon14 :No mon15 :No mon16 :No mon21 :No mon22 :No mon23 :No mon7 :No mon8 :No mon9 :No mon10 :No mon17 :No mon18 :No mon19 :No mon20 :No mon24 :No mon25 :No monv1 :No monv2 :No monv3 :No monv4 :No monv5 :No monv6 :No nam1 :CRT1SE nam2 :CRT2SE nam3 :CRT3SE nam4 :CRT4SE nam5 :CRT5SE nam6 :CRT6SE nam11 :CRT7SE nam12 :CRT8SE nam13 :CRT9SE nam14 :CRT10SE nam15 :CRT11SE nam16 :CRT12SE nam21 :CRTASE nam22 :CRTBSE nam23 :CRTCSE nam7 :PRE1 nam8 :QRE1 nam9 :PL2SE nam10 :QL2SE nam17 :PL3SE nam18 :QL3SE nam19 :PL4SE nam20 :QL4SE nam24 :PTSE nam25 :QTSE namv1 :V1SE namv2 :V2SE namv3 :V3SE namv4 :V4SE namv5 :V5SE namv6 :V6SE LENGTH :250000.0 ZM :650.951,293.036,293.036 TM :1.250734,0.8524767,0.8524767 R :3.618376E-4,1.854662E-5,1.854662E-5 TI :0.5773503,0.8164966,0.0,0.5773503,-0.4082483,0.7071068,0.5773503,-0.4082483,-0.7071068 PERCENT_OF_LINE :100.0 tlb :SCTline A1PosY :-32 C1PosY :32 A2PosY :64 C2PosY :128 A3PosY :160 C3PosY :224 A4PosY :256 C4PosY :320 enDebug :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 BUS 1008 976 0 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :0 y1L1 :-32 x2L1 :32 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :32 y2L2 :0 x1L3 :-64 y1L3 :32 x2L3 :32 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :1 L2ArcAtEnd2 :0 L3ArcAtEnd1 :1 L3ArcAtEnd2 :0 BUS 1168 1072 1 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-160 y1L1 :-32 x2L1 :128 y2L1 :-32 x1L2 :-160 y1L2 :0 x2L2 :128 y2L2 :0 x1L3 :-160 y1L3 :32 x2L3 :128 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 lf_rtds_sharc_sld_TLINE 1296 1104 0 0 102 Name :TL21SE Tnam1 :TL21 endsr :SENDING numc :3 lnbkr :No enbrl :Yes dirct :In ctpo :Yes dirpq :In pctpo :Yes tcnpq :0.01 bkrof :1.0e6 bkron :0.1 stat1 :Closed stat2 :Closed holdi :0.0 resi :0.0 indc :3. swdnm :TL1OCSE mon1 :No mon2 :No mon3 :No mon4 :No mon5 :No mon6 :No mon11 :No mon12 :No mon13 :No mon14 :No mon15 :No mon16 :No mon21 :No mon22 :No mon23 :No mon7 :No mon8 :No mon9 :No mon10 :No mon17 :No mon18 :No mon19 :No mon20 :No mon24 :No mon25 :No monv1 :No monv2 :No monv3 :No monv4 :No monv5 :No monv6 :No nam1 :CRT1SE nam2 :CRT2SE nam3 :CRT3SE nam4 :CRT4SE nam5 :CRT5SE nam6 :CRT6SE nam11 :CRT7SE nam12 :CRT8SE nam13 :CRT9SE nam14 :CRT10SE nam15 :CRT11SE nam16 :CRT12SE nam21 :CRTASE nam22 :CRTBSE nam23 :CRTCSE nam7 :PSE1 nam8 :QSE1 nam9 :PL2SE nam10 :QL2SE nam17 :PL3SE nam18 :QL3SE nam19 :PL4SE nam20 :QL4SE nam24 :PTSE nam25 :QTSE namv1 :V1SE namv2 :V2SE namv3 :V3SE namv4 :V4SE namv5 :V5SE namv6 :V6SE LENGTH :250000.0 ZM :650.951,293.036,293.036 TM :1.250734,0.8524767,0.8524767 R :3.618376E-4,1.854662E-5,1.854662E-5 TI :0.5773503,0.8164966,0.0,0.5773503,-0.4082483,0.7071068,0.5773503,-0.4082483,-0.7071068 PERCENT_OF_LINE :100.0 tlb :SCTline A1PosY :-32 C1PosY :32 A2PosY :64 C2PosY :128 A3PosY :160 C3PosY :224 A4PosY :256 C4PosY :320 enDebug :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 BUS 2160 1104 0 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-32 y1L1 :-32 x2L1 :0 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :32 y2L2 :0 x1L3 :-32 y1L3 :32 x2L3 :64 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :1 L3ArcAtEnd1 :0 L3ArcAtEnd2 :1 BUS 2192 1040 3 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-128 y1L1 :-32 x2L1 :128 y2L1 :-32 x1L2 :-128 y1L2 :0 x2L2 :128 y2L2 :0 x1L3 :-128 y1L3 :32 x2L3 :128 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 BUS 2544 976 0 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-224 y1L1 :-32 x2L1 :192 y2L1 :-32 x1L2 :-224 y1L2 :0 x2L2 :224 y2L2 :0 x1L3 :-224 y1L3 :32 x2L3 :256 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :1 L3ArcAtEnd1 :0 L3ArcAtEnd2 :1 BUS 1680 1104 0 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-64 y1L1 :-32 x2L1 :64 y2L1 :-32 x1L2 :-64 y1L2 :0 x2L2 :64 y2L2 :0 x1L3 :-64 y1L3 :32 x2L3 :64 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 BUS 1136 976 0 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-32 y1L1 :-32 x2L1 :64 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :32 y2L2 :0 x1L3 :-32 y1L3 :32 x2L3 :0 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :1 L2ArcAtEnd1 :0 L2ArcAtEnd2 :1 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 BUS 1200 1104 0 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :0 y1L1 :-32 x2L1 :32 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :32 y2L2 :0 x1L3 :-64 y1L3 :32 x2L3 :32 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :1 L2ArcAtEnd2 :0 L3ArcAtEnd1 :1 L3ArcAtEnd2 :0 lf_rtds_sharc_sld_TL16CAL 1936 976 0 0 26 Name :TL22 Dnm1 :SCTline cntyp :Bergeron pptline :No Icon :Large elimCrtLag :No exclu :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 rdData :tlb/cbl note1 : note2 : pp_var :100.0 hmnpp :(pp_var)% frcpi :No alwpi :No raistt :ERROR Ph :Yes final_tl_berg_format_tlbclb_tloclo_or_tlines_012 :0 final_tl_berg_percentage_line_length :0 final_tl_constants_file_name_cw_sufx :0 Type :TLINE enDebug :No rtds_sharc_sld_BUSLABEL 1744 1104 3 1 29 BName :BUS3 NA :N7 NB :N8 NC :N9 VRate :230.0 daout :No COL :RED LW :3 COLA :ORANGE COLB :RED COLC :RED Vi :1.0 Ai :0.0 Type :PQ BUS Vd :1.0 Ad :1.0 Dis1 :No A1PosX :-32 C1PosX :32 Num :3 prcA :None chnA :1 prcB :None chnB :1 prcC :None chnC :1 scl :187.79 damod :align Loadflow_RST :BUS: $Num, Vd, Ad rtds_sharc_sld_BUSLABEL 1168 912 0 1 29 BName :BUS4 NA :N10 NB :N11 NC :N12 VRate :230.0 daout :No COL :RED LW :3 COLA :ORANGE COLB :RED COLC :RED Vi :1.0 Ai :0.0 Type :PQ BUS Vd :1.0 Ad :1.0 Dis1 :No A1PosX :-32 C1PosX :32 Num :4 prcA :None chnA :1 prcB :None chnB :1 prcC :None chnC :1 scl :187.79 damod :align Loadflow_RST :BUS: $Num, Vd, Ad rtds_sharc_sld_BUSLABEL 2192 912 0 0 29 BName :BUS6 NA :N16 NB :N17 NC :N18 VRate :230.0 daout :No COL :RED LW :3 COLA :ORANGE COLB :RED COLC :RED Vi :1.0 Ai :0.0 Type :PQ BUS Vd :1.0 Ad :1.0 Dis1 :No A1PosX :-32 C1PosX :32 Num :6 prcA :None chnA :1 prcB :None chnB :1 prcC :None chnC :1 scl :187.79 damod :align Loadflow_RST :BUS: $Num, Vd, Ad rtds_sharc_sld_BUSLABEL 1840 720 1 0 29 BName :BUS7 NA :N19 NB :N20 NC :N21 VRate :230.0 daout :No COL :RED LW :3 COLA :ORANGE COLB :RED COLC :RED Vi :1.0 Ai :0.0 Type :PQ BUS Vd :1.0 Ad :1.0 Dis1 :No A1PosX :-32 C1PosX :32 Num :7 prcA :None chnA :1 prcB :None chnB :1 prcC :None chnC :1 scl :187.79 damod :align Loadflow_RST :BUS: $Num, Vd, Ad rtds_sharc_sld_BUSLABEL 1840 816 1 0 29 BName :BUS8 NA :N22 NB :N23 NC :N24 VRate :230.0 daout :No COL :RED LW :3 COLA :ORANGE COLB :RED COLC :RED Vi :1.0 Ai :0.0 Type :PQ BUS Vd :1.0 Ad :1.0 Dis1 :No A1PosX :-32 C1PosX :32 Num :7 prcA :None chnA :1 prcB :None chnB :1 prcC :None chnC :1 scl :187.79 damod :align Loadflow_RST :BUS: $Num, Vd, Ad lf_rtds_sharc_sld_BREAKER 1072 976 0 0 26 Anam :BRK2A ARcls :0.01 Aholdi :0.0 Asig :BRK2 Abit :1 Amon :Yes IAnam :IBRKA2 Bnam :BRK2B BRcls :0.01 Bholdi :0.0 Bsig :BRK2 Bbit :1 Bmon :Yes IBnam :IBRKB2 Cnam :BRK2C CRcls :0.01 Choldi :0.0 Csig :BRK2 Cbit :1 Cmon :Yes ICnam :IBRKC2 A1PosY :-32 C1PosY :32 A2PosY :-32 C2PosY :32 stat :Closed lf_rtds_sharc_sld_BREAKER 2288 976 0 0 26 Anam :BRK3A ARcls :0.01 Aholdi :0.0 Asig :BRK3 Abit :1 Amon :Yes IAnam :IBRKA3 Bnam :BRK3B BRcls :0.01 Bholdi :0.0 Bsig :BRK3 Bbit :1 Bmon :Yes IBnam :IBRKB3 Cnam :BRK3C CRcls :0.01 Choldi :0.0 Csig :BRK3 Cbit :1 Cmon :Yes ICnam :IBRKC3 A1PosY :32 C1PosY :-32 A2PosY :-32 C2PosY :32 stat :Closed BUS 976 752 1 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-288 y1L1 :-32 x2L1 :288 y2L1 :-32 x1L2 :-288 y1L2 :0 x2L2 :288 y2L2 :0 x1L3 :-288 y1L3 :32 x2L3 :288 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 BUS 944 560 0 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-64 y1L1 :-32 x2L1 :64 y2L1 :-32 x1L2 :-64 y1L2 :0 x2L2 :32 y2L2 :0 x1L3 :-64 y1L3 :32 x2L3 :0 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :1 L2ArcAtEnd1 :0 L2ArcAtEnd2 :1 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 lf_rtds_sharc_sld_BREAKER 848 560 0 0 26 Anam :BRK1A ARcls :0.01 Aholdi :0.0 Asig :BRK1 Abit :1 Amon :Yes IAnam :IBRKA1 Bnam :BRK1B BRcls :0.01 Bholdi :0.0 Bsig :BRK1 Bbit :1 Bmon :Yes IBnam :IBRKB1 Cnam :BRK1C CRcls :0.01 Choldi :0.0 Csig :BRK1 Cbit :1 Cmon :Yes ICnam :IBRKC1 A1PosY :-32 C1PosY :32 A2PosY :-32 C2PosY :32 stat :Open BUS 784 560 0 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-32 y1L1 :-32 x2L1 :32 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :32 y2L2 :0 x1L3 :-32 y1L3 :32 x2L3 :32 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 _rtds_3P2W_TRF.def 656 560 0 0 179 Name :T1 type :No tapCh :No edge :Falling Edge inps :RunTime Tmva :200 f :60.0 xl :0.08 NLL :0.0 CuL :0 NLLtp :Winding AorM :Automatic CARD :1 Rprc :A Aprc :Either AM :NO CORE :1 YD1 :Y-Gnd pol1 :+ve rot1 :ABC VL1 :13.8 Im1 :1.0 trfbrkP :No LDtype1 :R Rg1 :10.0 Rs1 :10.0 Rp1 :10.0 LLp1 :1.0 CLp1 :1.0 YD2 :Y-Gnd pol2 :+ve rot2 :ABC VL2 :230.0 Im2 :1.0 trfbrkS :No LDtype2 :R Rg2 :10.0 Rs2 :10.0 Rp2 :10.0 LLp2 :1.0 CLp2 :1.0 Sat :#1 Xair :0.2 Tdc :100.0 Xknee :1.25 hLoss :LOOPWITDH Lw :30 hyl :0.05 Edl :0.05 useFX0 :NO nFX0A :FX0A nFX0B :FX0B nFX0C :FX0C NoTaps :10 TR1 :5 step :0.01 TR2 :1.0 limH :1.2 limL :0.8 DOWNd :down1 UPd :up1 POSd :TapPos P1 :0.80 P2 :0.85 P3 :0.90 P4 :0.95 P5 :1.00 P6 :1.05 P7 :1.10 P8 :1.15 P9 :1.20 P10 :1.25 P11 :1.26 P12 :1.27 P13 :1.28 P14 :1.29 P15 :1.30 P16 :1.31 P17 :1.32 P18 :1.33 P19 :1.34 P20 :1.35 P21 :1.36 P22 :1.37 P23 :1.38 P24 :1.39 P25 :1.40 P26 :1.41 P27 :1.42 P28 :1.43 P29 :1.44 P30 :1.45 P31 :1.46 P32 :1.47 P33 :1.48 P34 :1.49 P35 :1.50 P36 :1.51 P37 :1.52 P38 :1.53 P39 :1.54 P40 :1.55 P41 :1.56 P42 :1.57 P43 :1.58 P44 :1.59 P45 :1.60 P46 :1.61 P47 :1.62 P48 :1.63 P49 :1.64 P50 :1.65 Ropn1 :1.0e8 Rcls1 :0.01 Ropn2 :1.0e8 Rcls2 :0.01 statP :Closed statS :Closed swdnmP :PBKWD PBIT1 :1 PBIT2 :2 PBIT3 :3 swdnmS :SBKWD SBIT1 :1 SBIT2 :2 SBIT3 :3 sfx : dirct :In ydm1 :Lines mia1 :No mib1 :No mic1 :No ydm2 :Lines mia2 :No mib2 :No mic2 :No mvn1 :No min1 :No mvn2 :No min2 :No mev1 :No mev2 :No mfa :No mfb :No mfc :No mma :No mmb :No mmc :No ILA1 :IL1A ILB1 :IL1B ILC1 :IL1C ILA2 :IL2A ILB2 :IL2B ILC2 :IL2C VN1 :VN1 IN1 :IN1 VN2 :VN2 IN2 :IN2 EVA1 :V1 EVB1 :V2 EVC1 :V3 EVA2 :V4 EVB2 :V5 EVC2 :V6 FXA :FluxA FXB :FluxB FXC :FluxC IMA :IMA IMB :IMB IMC :IMC A1PosY :32 C1PosY :-32 A2PosY :-32 C2PosY :32 A3PosY :96 C3PosY :160 sharp :0. ND :0.0 DIST :No BUS 496 656 3 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-160 y1L1 :-32 x2L1 :160 y2L1 :-32 x1L2 :-160 y1L2 :0 x2L2 :160 y2L2 :0 x1L3 :-160 y1L3 :32 x2L3 :160 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :0 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 BUS 432 720 0 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-32 y1L1 :-32 x2L1 :32 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :64 y2L2 :0 x1L3 :-32 y1L3 :32 x2L3 :96 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :0 L2ArcAtEnd1 :0 L2ArcAtEnd2 :1 L3ArcAtEnd1 :0 L3ArcAtEnd2 :1 BUS 528 560 2 0 26 LW3 :1.0 ACOL :ORANGE BCOL :RED CCOL :RED LW1 :3.0 SCOL :RED CONVERGE :NO DOCUMENT :NO x1L1 :-32 y1L1 :-32 x2L1 :64 y2L1 :-32 x1L2 :-32 y1L2 :0 x2L2 :32 y2L2 :0 x1L3 :-32 y1L3 :32 x2L3 :0 y2L3 :32 L1ArcAtEnd1 :0 L1ArcAtEnd2 :1 L2ArcAtEnd1 :0 L2ArcAtEnd2 :1 L3ArcAtEnd1 :0 L3ArcAtEnd2 :0 rtds_sharc_sld_BUSLABEL 496 496 0 0 29 BName :BUS1 NA :N1 NB :N2 NC :N3 VRate :230.0 daout :No COL :RED LW :3 COLA :ORANGE COLB :RED COLC :RED Vi :1.0 Ai :0.0 Type :PQ BUS Vd :1.0 Ad :1.0 Dis1 :No A1PosX :-32 C1PosX :32 Num :1 prcA :None chnA :1 prcB :None chnB :1 prcC :None chnC :1 scl :187.79 damod :align Loadflow_RST :BUS: $Num, Vd, Ad lf_rtds_sharc_sld_MACV31 208 720 0 0 284 Name :GEN1 cnfg :Generator cfgr :One trfa :No mmva :194.5 Vbsll :13.8 HTZ :60.0 satur :Points MM :No spdin :Zero tecc :Yes vtcc :Yes trfmr :No ldmh1 :No ldmh2 :No Sbrk :No Sbrkof :1.0e3 Sbrkon :1.0e-4 Sstat1 :Closed Sswdnm :SBKWORD SAbit :1 SBbit :1 SCbit :1 exclu :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 H :3.25 D :0.05 MSW :CC spdmd :Free inh :No ind :Yes upexw :1.15 loexw :0.0 Vmagn :1.003604 Vangl :6.868565 P0 :600 Q0 :116.153192 rmpc :Yes rmptc :0.05 iszro :No izro :No Pt :600 Qt :0.0 ConFlag :0 XS1 :0.13 XMD0 :1.66 X230 :0.0 X2D :0.0618 X3D :0.00546 XMQ :1.58 X2Q :0.3293 X3Q :0.0942 RS1 :0.002 R2D :0.001407 R3D :0.00407 R2Q :0.01415 R3Q :0.0082 Xa :0.16 Xd :1.0869 Xd' :0.3661 Xd'' :0.286 Gfld :100.0 Bfld :100.0 Xq :0.7208 Xq' :0.2427 Xq'' :0.2427 Ra :0.003 Tdo' :8.81 Tdo'' :0.05 Tqo' :0.388 Tqo'' :0.07 Mrzro :0.003 Mxzro :0.2327 Rneut :1.0E5 Xneut :0.0 C1 :0.0 V1 :0.0 C2 :0.63 V2 :0.63 C3 :0.9456 V3 :0.9050 C4 :1.0511 V4 :0.9710 C5 :1.1556 V5 :1.0210 C6 :1.2611 V6 :1.0650 C7 :1.3656 V7 :1.1010 C8 :1.6811 V8 :1.1880 C9 :2.1022 V9 :1.2750 C10 :2.4167 V10 :1.3360 SE10 :0.152 SE12 :0.469 vtpri :230.0 vtsec :13.8 dlagp :Lags TMVA :200.0 trpos :0.0 txpos :0.08 itzro :Yes trzro :0.0 txzro :0.00328 tloss :0.01 ldr1 :1.0e6 ldl1 :1.0e6 ldc1 :1.0 ldr2 :1.0e6 ldl2 :1.0e6 ldc2 :1.0 tconp :0.05 tconc :0.0 tconv :0.02 ledim :Yes ledvm :Yes lednt :Yes ledit :Yes mon1 :Yes mon2 :Yes mon3 :No mon4 :No mon5 :No mon6 :No mon7 :No mon8 :No mon9 :No mon11 :No mon12 :No mon13 :No mon14 :No mon15 :No mon16 :No mon17 :No mon18 :No mon29 :No mon30 :No mon19 :No mon20 :No mon21 :No mon22 :No mon23 :No mon26 :No mon27 :No mon28 :No ao1 :No ao2 :No ao3 :No ao4 :No ao5 :No ao6 :No ao7 :No ao8 :No ao9 :No ao10 :No ao11 :No ao12 :No ao13 :No ao14 :No ao15 :No ao16 :No ao17 :No ao18 :No ao24 :No ao25 :No ao19 :No ao20 :No ao21 :No ao22 :No ao23 :No chn1 :1 scl1 :100.0 chn2 :2 scl2 :100.0 chn3 :3 scl3 :1.0 chn4 :4 scl4 :20.0 chn5 :5 scl5 :20.0 chn6 :6 scl6 :20.0 chn7 :7 scl7 :2.0 chn8 :8 scl8 :2.0 chn9 :5 scl9 :2.0 chn10 :5 scl10 :1.0 chn11 :5 scl11 :2.0 chn12 :5 scl12 :2.0 chn13 :5 scl13 :6.283 chn14 :5 scl14 :2.0 chn15 :5 scl15 :10.0 chn16 :5 scl16 :20.0 chn17 :5 scl17 :20.0 chn18 :5 scl18 :20.0 chn24 :5 scl24 :1.0 chn25 :5 scl25 :500.0 chn19 :5 scl19 :100.0 chn20 :5 scl20 :100.0 chn21 :4 scl21 :20.0 chn22 :5 scl22 :20.0 chn23 :6 scl23 :20.0 sfx : nam1 :PMACH1 nam2 :QMACH1 nam3 :LOADANG1 nam4 :IMACA1 nam5 :IMACB1 nam6 :IMACC1 nam7 :MAXCRT1 nam8 :ED1 nam9 :EQ1 nam10 :VTPU1 nam11 :ID1 nam12 :IQ1 nam13 :ROTANG1 nam14 :CNEUT1 nam15 :VNEUT1 nam16 :MACVA1 nam17 :MACVB1 nam18 :MACVC1 nam24 :ELTRQ1 nam25 :MSPED1 nam29 :PsiD1 nam30 :PsiQ1 nam19 :PTRF1 nam20 :QTRF1 nam21 :ITRFA1 nam22 :ITRFB1 nam23 :ITRFC1 nam26 :MACBVA1 nam27 :MACBVB1 nam28 :MACBVC1 pmc1_0 :0 pmc2_0 :0 pmc3_0 :0 pmc4_0 :0 pmc1_2 :0 pmc2_2 :0 pmc3_2 :0 pmc4_2 :0 nam_exT0_1 :PM10MACH1 nam_exT0_2 :PM20MACH1 nam_exT0_3 :PM30MACH1 nam_exT0_4 :PM40MACH1 nam_exT2_1 :PM12MACH1 nam_exT2_2 :PM22MACH1 nam_exT2_3 :PM32MACH1 nam_exT2_4 :PM42MACH1 A1PosX :-32 C1PosX :32 LFIdent :1 Num :6 Num2 :0 Vi :0.0 Ai :0.0 Type :PQ BUS Vd :0 Ad :0 Loadflow_RST :SOURCE: $LFIdent, Vmagn, Vangl, P0, Q0 WIRE 176 816 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 176 624 1 0 2 -4 0 4 32 COL :RED LW :1.0 WIRE 144 624 0 0 2 -32 -4 32 4 COL :RED LW :1.0 wirelabel 112 624 0 0 3 Name :Ef COL :BLUE Monitor :Yes WIRE 336 816 1 0 2 -4 -32 4 0 COL :RED LW :1.0 wirelabel 176 848 0 0 3 Name :W COL :BLUE Monitor :Yes wirelabel 208 848 0 0 3 Name :Tm COL :BLUE Monitor :Yes rtds_sharc_ctl_CONSTANT 368 816 1 1 1 Val :01 wirelabel 336 816 0 0 3 Name :MacDump COL :BLUE Monitor :Yes WIRE 112 720 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 112 720 0 0 3 Name :Te COL :BLUE Monitor :Yes lf_rtds_sharc_sld_TL16CAL 2288 624 0 1 26 Name :TL61 Dnm1 :TCTline cntyp :Bergeron pptline :No Icon :Large elimCrtLag :No exclu :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 rdData :tlb/cbl note1 : note2 : pp_var :100.0 hmnpp :(pp_var)% frcpi :No alwpi :No raistt :ERROR Ph :Yes final_tl_berg_format_tlbclb_tloclo_or_tlines_012 :0 final_tl_berg_percentage_line_length :0 final_tl_constants_file_name_cw_sufx :0 Type :TLINE enDebug :No HIERARCHY 464 368 0 0 22 FCOL :BLACK BCOL :WHITE LW :1.0 DESC1 :Voltage DESC2 :Regulator IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :74 x1 :-32 y1 :-32 x2 :32 y2 :32 canvasX :49 canvasY :62 canvasWidth :1326 canvasHeight :561 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No rtds_sharc_ctl_CONSTANT 176 240 0 0 1 Val :0.95 rtds_sharc_ctl_GAIN 592 112 0 0 3 K :0.2 Proc :1 Pri :76 WIRE 528 144 1 0 2 -4 -32 4 32 COL :RED LW :1.0 rtds_sharc_ctl_SUM3 496 176 2 1 7 Num :TWO IorF :REAL IN1 :+ IN2 :- IN3 :- Proc :1 Pri :75 WIRE 528 176 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 720 176 0 0 2 -96 -4 64 4 COL :RED LW :1.0 wirelabel 528 176 0 0 3 Name :VErr COL :BLUE Monitor :Yes wirelabel 656 176 0 0 3 Name :VPTerm COL :BLUE Monitor :Yes WIRE 432 144 0 0 2 -96 -4 64 4 COL :RED LW :1.0 WIRE 528 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_SIGSW 304 144 0 0 5 A :0 DPath :REAL Pos :A Proc :1 Pri :74 WIRE 304 176 1 0 2 -4 0 4 32 COL :RED LW :1.0 WIRE 240 144 0 0 2 -32 -4 32 4 COL :RED LW :1.0 wirelabel 304 176 0 0 3 Name :StartRT COL :BLUE Monitor :Yes rtds_sharc_ctl_GAIN 592 176 0 0 3 K :8 Proc :1 Pri :85 rtds_sharc_ctl_COMPARE 272 208 0 0 9 LOG :A > B INPT :REAL OUTT :INTEGER Proc :1 Pri :73 IOAB :1 IOBA :0 FOAB :1.25 FOBA :-1.333 WIRE 208 208 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 208 240 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 208 208 0 0 3 Name :WFil COL :BLUE Monitor :Yes GROUP 528 368 0 0 0 2 GROUP 528 368 0 0 0 3 WIRE 528 368 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 496 368 0 0 1 Val :0.2 wirelabel 560 368 0 0 3 Name :VBat COL :BLUE Monitor :Yes annotation 528 400 0 0 3 AL1 :Tensão da Bateria AL2 : FSize :10 rtds_sharc_ctl_RATELIMIT 208 144 0 1 6 ULim :2 LLIm :-2 Xic :0.0 Yic :0.0 Proc :1 Pri :22 wirelabel 240 144 0 0 3 Name :Vreq COL :BLUE Monitor :Yes WIRE 144 144 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_SLIDER 112 144 0 0 5 Name :setpointV Init :1 Max :2 Min :-2 Units :volts wirelabel 688 368 0 0 3 Name :StartRT COL :BLUE Monitor :Yes rtds_sharc_ctl_EDGEDET 752 368 0 0 4 ED :0 -> 1 OV :1 Proc :1 Pri :84 WIRE 720 368 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 816 368 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_TIME 848 400 0 0 3 Mode :second Proc :1 Pri :91 WIRE 912 400 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_COMPARE 944 368 0 0 9 LOG :A >= B INPT :REAL OUTT :INTEGER Proc :1 Pri :95 IOAB :1 IOBA :0 FOAB :1.25 FOBA :-1.333 rtds_sharc_ctl_CONSTANT 816 336 0 0 1 Val :2 WIRE 912 368 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 880 336 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 880 368 1 0 2 -4 -32 4 0 COL :RED LW :1.0 WIRE 1008 368 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 1008 368 0 0 3 Name :PreEx COL :BLUE Monitor :Yes annotation 848 432 0 0 3 AL1 :Controle da Pré-Excitação AL2 : FSize :10 WIRE 464 176 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_XDIVY 432 176 0 0 4 DBZ :Halt Val :1e8 Proc :1 Pri :21 WIRE 400 176 0 1 2 0 -4 -32 4 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 400 208 0 0 1 Val :8.07 wirelabel 400 176 0 1 3 Name :VMac COL :BLUE Monitor :Yes WIRE 240 48 0 0 2 -32 -4 0 4 COL :RED LW :1.0 rtds_sharc_ctl_XDIVY 176 48 0 0 4 DBZ :Halt Val :1e8 Proc :1 Pri :20 WIRE 144 48 0 1 2 0 -4 -32 4 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 144 80 0 0 1 Val :8.07 wirelabel 144 48 0 1 3 Name :VMac COL :BLUE Monitor :Yes WIRE 240 112 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 240 80 1 0 2 -4 -32 4 32 COL :RED LW :1.0 rtds_sharc_ctl_SUM3 784 176 2 1 7 Num :TWO IorF :REAL IN1 :+ IN2 :+ IN3 :- Proc :1 Pri :90 WIRE 784 112 0 0 2 -32 -4 0 4 COL :RED LW :1.0 WIRE 784 144 1 0 2 -4 -32 4 0 COL :RED LW :1.0 wirelabel 784 112 2 0 3 Name :VITerm COL :BLUE Monitor :Yes rtds_sharc_ctl_INTGL 688 112 0 0 9 T :1 RST :No LIM :Internal Xic :0.0 Yic :0.0 PItype :Fixed Tic :1 Proc :1 Pri :83 WIRE 656 112 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 912 176 0 0 3 Name :Efld COL :BLUE Monitor :Yes WIRE 944 176 0 0 2 -96 -4 96 4 COL :RED LW :1.0 rtds_sharc_ctl_DYNLIMS 848 176 0 1 3 IorF :REAL Proc :1 Pri :94 rtds_sharc_ctl_CONSTANT 816 240 3 0 1 Val :-10 wirelabel 944 240 0 0 3 Name :VBat COL :BLUE Monitor :Yes WIRE 1136 208 0 0 2 -32 -4 0 4 COL :RED LW :1.0 wirelabel 1136 208 0 0 3 Name :Ef COL :BLUE Monitor :Yes wirelabel 1072 240 0 0 3 Name :PreEx COL :BLUE Monitor :Yes rtds_sharc_ctl_SIGSW 1072 208 0 0 5 A :0 DPath :REAL Pos :A Proc :1 Pri :97 rtds_sharc_ctl_MINMAX 1008 208 0 0 4 IorF :REAL Mode :Maximum Proc :1 Pri :96 wirelabel 944 208 0 0 3 Name :Efld COL :BLUE Monitor :Yes WIRE 976 208 0 0 2 -32 -4 32 4 COL :RED LW :1.0 WIRE 976 240 0 0 2 -32 -4 32 4 COL :RED LW :1.0 WIRE 816 80 0 0 2 -64 -4 32 4 COL :RED LW :1.0 WIRE 848 112 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 784 208 0 0 2 -64 -4 32 4 COL :RED LW :1.0 jumper 720 176 3 0 2 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 880 80 2 0 1 Val :10 HIERARCHY 560 368 2 0 22 FCOL :BLACK BCOL :WHITE LW :1.0 DESC1 :with auto-sync DESC2 :Breaker logic IMAGE : IMAGE_RESIZE :NO EXCLUDE :NO ComponentCount :71 x1 :-64 y1 :-32 x2 :32 y2 :32 canvasX :45 canvasY :49 canvasWidth :834 canvasHeight :794 isOpen :NO scrtpass : email : hasBeenUnlocked :0 CALCULATE_NS :No WIRE 400 240 0 0 2 -64 -4 32 4 COL :RED LW :1.0 wirelabel 176 368 2 0 3 Name :AngDif COL :BLUE Monitor :Yes rtds_sharc_ctl_RANGE 240 368 0 0 9 OP :L<=A<=U INPT :REAL OUTT :INTEGER Proc :1 Pri :19 IOAB :1 IOBA :0 FOAB :1.0 FOBA :-1.0 WIRE 176 368 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 176 336 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 176 400 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 144 336 0 0 1 Val :0.15 rtds_sharc_ctl_CONSTANT 144 400 0 0 1 Val :-0.15 rtds_sharc_ctl_RANGE 240 528 0 0 9 OP :L<=A<=U INPT :REAL OUTT :INTEGER Proc :1 Pri :18 IOAB :1 IOBA :0 FOAB :1.0 FOBA :-1.0 rtds_sharc_ctl_SUM3 144 528 2 1 7 Num :TWO IorF :REAL IN1 :- IN2 :+ IN3 :- Proc :1 Pri :17 rtds_sharc_ctl_SDELAY 112 496 0 0 6 IorF :Real DEL :1 NS :1 INIT :0.0 Proc :1 Pri :16 wirelabel 48 496 2 0 3 Name :AngDif COL :BLUE Monitor :Yes wirelabel 48 528 2 0 3 Name :AngDif COL :BLUE Monitor :Yes WIRE 48 496 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 112 528 0 0 2 -64 -4 32 4 COL :RED LW :1.0 WIRE 176 528 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 176 496 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 176 464 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 176 560 1 0 2 -4 0 4 32 COL :RED LW :1.0 rtds_sharc_ctl_CONSTANT 144 592 0 0 1 Val :-0.15 rtds_sharc_ctl_CONSTANT 144 432 0 0 1 Val :0.15 WIRE 176 560 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 304 528 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 400 368 0 0 2 -96 -4 96 4 COL :RED LW :1.0 rtds_sharc_ctl_LOGIC 528 336 0 0 6 Type :AND Inv :No Op :LSB Ninp :4 Proc :1 Pri :42 WIRE 432 304 1 0 2 -4 -64 4 32 COL :RED LW :1.0 WIRE 464 208 1 0 2 -4 -128 4 96 COL :RED LW :1.0 WIRE 464 400 0 0 2 -32 -4 32 4 COL :RED LW :1.0 WIRE 464 336 0 0 2 -32 -4 32 4 COL :RED LW :1.0 WIRE 464 304 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 432 464 1 0 2 -4 -64 4 64 COL :RED LW :1.0 WIRE 400 528 0 0 2 -64 -4 32 4 COL :RED LW :1.0 WIRE 624 336 0 0 2 -64 -4 32 4 COL :RED LW :1.0 wirelabel 368 240 0 0 3 Name :VCerto COL :BLUE Monitor :Yes wirelabel 368 368 0 0 3 Name :AngCerto COL :BLUE Monitor :Yes wirelabel 368 528 0 0 3 Name :AngRate COL :BLUE Monitor :Yes rtds_sharc_ctl_SRFF 400 112 0 0 4 ISTA :Q = 0 INV :High Proc :1 Pri :15 WIRE 336 80 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_MONO 304 80 0 0 7 PN :Rising TM :Fixed LOT :10 OT :1 OR :0 Proc :1 Pri :14 WIRE 240 80 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_PB 208 80 0 0 4 Name :BRKCLOSE Type :INTEGER VOn :1 VOff :0 WIRE 432 80 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 336 144 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_MONO 304 144 0 0 7 PN :Rising TM :Fixed LOT :0.0 OT :1 OR :0 Proc :1 Pri :13 wirelabel 240 144 0 0 3 Name :OPEN COL :BLUE Monitor :Yes WIRE 240 144 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 464 80 2 0 3 Name :VCLOSE COL :BLUE Monitor :Yes WIRE 752 336 0 0 2 -32 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_MONO 688 336 0 0 7 PN :Rising TM :Fixed LOT :0.0 OT :1 OR :0 Proc :1 Pri :49 rtds_sharc_ctl_SRFF 816 368 0 0 4 ISTA :Q = 0 INV :High Proc :1 Pri :54 rtds_sharc_ctl_PB 560 400 0 0 4 Name :BRKOPEN Type :INTEGER VOn :1 VOff :0 WIRE 624 400 0 0 2 -32 -4 32 4 COL :RED LW :1.0 wirelabel 624 400 0 0 3 Name :OPEN COL :BLUE Monitor :Yes rtds_sharc_ctl_MONO 688 400 0 0 7 PN :Rising TM :Fixed LOT :0.0 OT :1 OR :0 Proc :1 Pri :12 WIRE 752 400 0 0 2 -32 -4 32 4 COL :RED LW :1.0 WIRE 848 336 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 880 336 0 0 3 Name :BRK1 COL :BLUE Monitor :Yes wirelabel 624 336 0 0 3 Name :CLOSE COL :BLUE Monitor :Yes rtds_sharc_ctl_RANGE 272 240 0 0 9 OP :L<=A<=U INPT :REAL OUTT :INTEGER Proc :1 Pri :11 IOAB :1 IOBA :0 FOAB :1.0 FOBA :-1.0 WIRE 208 208 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_GAIN 176 208 0 0 3 K :1.05 Proc :1 Pri :10 WIRE 112 208 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 112 208 0 0 3 Name :VBus COL :BLUE Monitor :Yes WIRE 208 272 0 0 2 0 -4 32 4 COL :RED LW :1.0 rtds_sharc_ctl_GAIN 176 272 0 0 3 K :0.95 Proc :1 Pri :9 WIRE 112 272 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 112 272 0 0 3 Name :VBus COL :BLUE Monitor :Yes WIRE 112 240 0 0 2 0 -4 32 4 COL :RED LW :1.0 WIRE 208 240 0 0 2 0 -4 32 4 COL :RED LW :1.0 wirelabel 112 240 0 0 3 Name :VMac COL :BLUE Monitor :Yes rtds_sharc_ctl_GAIN 176 240 0 0 3 K :16.666 Proc :1 Pri :8 lf_rtds_sharc_sld_TL16CAL 1392 624 0 1 26 Name :TL62 Dnm1 :TCTline cntyp :Bergeron pptline :No Icon :Large elimCrtLag :No exclu :No AorM :Automatic CARD :1 Rprc :A AM :NO CORE :1 rdData :tlb/cbl note1 : note2 : pp_var :100.0 hmnpp :(pp_var)% frcpi :No alwpi :No raistt :ERROR Ph :Yes final_tl_berg_format_tlbclb_tloclo_or_tlines_012 :0 final_tl_berg_percentage_line_length :0 final_tl_constants_file_name_cw_sufx :0 Type :TLINE enDebug :No WIRE 208 816 1 0 2 -4 -32 4 32 COL :RED LW :1.0 WIRE 240 816 1 0 2 -4 -32 4 32 COL :RED LW :1.0 wirelabel 240 848 0 1 3 Name :partida COL :BLUE Monitor :Yes