-------------------------------------------------------
--! @file integerCombinatoryMultiplier.vhd
--! @brief N bits integer multiplier (TB)
--! @author Bruno Albertini (balbertini@usp.br)
--! @date 2017-11-13
-------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity integerCombinatoryMultiplier_tb is end;

architecture dut of integerCombinatoryMultiplier_tb is
  component integerCombinatoryMultiplier is
    generic (n: natural);
    port ( a, b: in  std_logic_vector(n-1 downto 0);
           r   : out std_logic_vector(2*n-1 downto 0));
  end component;

  --! operands size
  constant n: natural := 4;

  --! Temporary signals
  signal tA, tB:  std_logic_vector(n-1 downto 0);
  signal tR:  std_logic_vector(2*n-1 downto 0);

begin

  --! Multiplier instance (choose just one architecture)
  dut: entity work.integerCombinatoryMultiplier(functional)
  -- dut: entity work.integerCombinatoryMultiplier(dadda)
  -- dut: entity work.integerCombinatoryMultiplier(wallace)
    generic map (n)
    port map(tA, tB, tR);

  --! stimuli proccess
  st: process is
  begin
    for i in 0 to (2**n-1) loop
      for j in 0 to (2**n-1) loop
        --! generate all inputs
        tA <= std_logic_vector(to_unsigned(i,n));
        tB <= std_logic_vector(to_unsigned(j,n));
        wait for 1 ns;
        --! and compare with the calculated value
        assert tR = std_logic_vector(to_unsigned(i,n)*to_unsigned(j,n))
        report "Multiplication of " & integer'image(i) &  " and " & integer'image(j) &
        " resulted in " & integer'image(to_integer(unsigned(tr))) &
        " while should be " & integer'image(to_integer(to_unsigned(i,n)*to_unsigned(j,n))) & ".";
      end loop;
    end loop;

    wait;
  end process;
end dut;